Subject: Re: [PATCH v2] clk: uniphier: Add SCSSI clock gate for each channel

From: Stephen Boyd <[email-masked]>
Date: Sat, 04 Jan 2020 23:14:38 -0800

Quoting Kunihiko Hayashi (2019-12-26 17:42:05)
> SCSSI has clock gates for each channel in the SoCs newer than Pro4,
> so this adds missing clock gates for channel 1, 2 and 3. And more, this
> moves MCSSI clock ID after SCSSI.
> 
> Fixes: ff388ee36516 ("clk: uniphier: add clock frequency support for SPI")
> Signed-off-by: Kunihiko Hayashi <[email-masked]>
> Acked-by: Masahiro Yamada <[email-masked]>
> ---

Applied to clk-next

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