Subject: [GIT PULL v2] i.MX clock changes for 5.6

From: Shawn Guo <[email-masked]>
Date: Wed, 15 Jan 2020 19:10:32 +0800

Changes for v2:
 - Drop imx8m_clk_hw_composite_core() change set, which breaks some
   existing DTB right away.

The following changes since commit e42617b825f8073569da76dc4510bfa019b1c35a:

  Linux 5.5-rc1 (2019-12-08 14:57:55 -0800)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git tags/imx-clk-5.6

for you to fetch changes up to 9c140d9926761b0f5d329ff6c09a1540f3d5e1d3:

  clk: imx: Add support for i.MX8MP clock driver (2020-01-12 14:07:36 +0800)

----------------------------------------------------------------
i.MX clock changes for 5.6:

 - A series from Abel Vesa to do some trivial cleanups which will be
   helpful for i.MX clock driver switching to clk_hw based API.
 - A series from Anson Huang to add i.MX8MP clock driver support.
 - Disable non-functional divider between pll4_audio_div and
   pll4_post_div on imx6q.
 - Fix watchdog2 clock name typo in imx7ulp clock driver.
 - A couple of patches from Leonard Crestez to set CLK_GET_RATE_NOCACHE
   flag for DRAM related clocks on i.MX8M SoCs.
 - Suppress bind attrs for i.MX8M clock driver to avoid the possibility
   of reloading the driver at runtime.
 - Add a big comment in imx8qxp-lpcg driver to tell why
   devm_platform_ioremap_resource() shouldn't be used for the driver.
 - A correction on i.MX8MN usb1_ctrl parent clock setting.
 - A couple of trivial cleanup on clk-divider-gate driver.
 - A series from Peng Fan to convert i.MX8M clock drivers to clk_hw
   based API.

----------------------------------------------------------------
Abel Vesa (11):
      clk: imx: Add correct failure handling for clk based helpers
      clk: imx: Rename the SCCG to SSCG
      clk: imx: Replace all the clk based helpers with macros
      clk: imx: pllv1: Switch to clk_hw based API
      clk: imx: pllv2: Switch to clk_hw based API
      clk: imx: imx7ulp composite: Rename to show is clk_hw based
      clk: imx: Rename sccg and frac pll register to suggest clk_hw
      clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw based
      clk: imx: Rename the imx_clk_pfdv2 to imply it's clk_hw based
      clk: imx: Rename the imx_clk_divider_gate to imply it's clk_hw based
      clk: imx7up: Rename the clks to hws

Anson Huang (3):
      clk: imx: gate4: Switch imx_clk_gate4_flags() to clk_hw based API
      dt-bindings: imx: Add clock binding doc for i.MX8MP
      clk: imx: Add support for i.MX8MP clock driver

Fabio Estevam (1):
      clk: imx7ulp: Fix watchdog2 clock name typo

Jan Remmet (1):
      clk: imx6q: disable non functional divider

Leonard Crestez (4):
      clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocks
      clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHE
      clk: imx8m: Suppress bind attrs
      clk: imx8qxp-lpcg: Warn against devm_platform_ioremap_resource

Li Jun (1):
      clk: imx8mn: correct the usb1_ctrl parent to be usb_bus

Peng Fan (11):
      clk: imx: clk-divider-gate: fix a typo in comment
      clk: imx: clk-divider-gate: drop redundant initialization
      clk: imx: clk-pll14xx: Switch to clk_hw based API
      clk: imx: clk-composite-8m: Switch to clk_hw based API
      clk: imx: add imx_unregister_hw_clocks
      clk: imx: add hw API imx_clk_hw_mux2_flags
      clk: imx: gate3: Switch to clk_hw based API
      clk: imx: Remove __init for imx_obtain_fixed_clk_hw() API
      clk: imx: imx8mn: Switch to clk_hw based API
      clk: imx: imx8mm: Switch to clk_hw based API
      clk: imx: imx8mq: Switch to clk_hw based API

 .../devicetree/bindings/clock/imx8mp-clock.yaml    |  68 ++
 drivers/clk/imx/Kconfig                            |   6 +
 drivers/clk/imx/Makefile                           |   3 +-
 drivers/clk/imx/clk-composite-7ulp.c               |   2 +-
 drivers/clk/imx/clk-composite-8m.c                 |   4 +-
 drivers/clk/imx/clk-divider-gate.c                 |  12 +-
 drivers/clk/imx/clk-frac-pll.c                     |   7 +-
 drivers/clk/imx/clk-imx6q.c                        |   5 +-
 drivers/clk/imx/clk-imx7ulp.c                      | 182 ++---
 drivers/clk/imx/clk-imx8mm.c                       | 565 +++++++--------
 drivers/clk/imx/clk-imx8mn.c                       | 498 +++++++-------
 drivers/clk/imx/clk-imx8mp.c                       | 764 +++++++++++++++++++++
 drivers/clk/imx/clk-imx8mq.c                       | 584 ++++++++--------
 drivers/clk/imx/clk-imx8qxp-lpcg.c                 |  11 +
 drivers/clk/imx/clk-pfdv2.c                        |   2 +-
 drivers/clk/imx/clk-pll14xx.c                      |  29 +-
 drivers/clk/imx/clk-pllv1.c                        |  14 +-
 drivers/clk/imx/clk-pllv2.c                        |  14 +-
 drivers/clk/imx/clk-pllv4.c                        |   2 +-
 drivers/clk/imx/{clk-sccg-pll.c => clk-sscg-pll.c} | 152 ++--
 drivers/clk/imx/clk.c                              |  12 +-
 drivers/clk/imx/clk.h                              | 162 +++--
 include/dt-bindings/clock/imx8mp-clock.h           | 300 ++++++++
 23 files changed, 2346 insertions(+), 1052 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/imx8mp-clock.yaml
 create mode 100644 drivers/clk/imx/clk-imx8mp.c
 rename drivers/clk/imx/{clk-sccg-pll.c => clk-sscg-pll.c} (70%)
 create mode 100644 include/dt-bindings/clock/imx8mp-clock.h

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