From: Sasha Levin <sashal@kernel•org>
To: linux-kernel@vger•kernel.org, stable@vger•kernel.org
Cc: Sasha Levin <sashal@kernel•org>,
linux-clk@vger•kernel.org, Maxime Ripard <maxime@cerno•tech>,
linux-arm-kernel@lists•infradead.org,
Samuel Holland <samuel@sholland•org>
Subject: [PATCH AUTOSEL 4.19 13/56] clk: sunxi-ng: h6-r: Fix AR100/R_APB2 parent order
Date: Fri, 24 Jan 2020 09:19:29 -0500 [thread overview]
Message-ID: <20200124142012.29752-13-sashal@kernel.org> (raw)
In-Reply-To: <20200124142012.29752-1-sashal@kernel.org>
From: Samuel Holland <samuel@sholland•org>
[ Upstream commit 0c545240aebc2ccb8f661dc54283a14d64659804 ]
According to the BSP source code, both the AR100 and R_APB2 clocks have
PLL_PERIPH0 as mux index 3, not 2 as it was on previous chips. The pre-
divider used for PLL_PERIPH0 should be changed to index 3 to match.
This was verified by running a rough benchmark on the AR100 with various
clock settings:
| mux | pre-divider | iterations/second | clock source |
|=====|=============|===================|==============|
| 0 | 0 | 19033 (stable) | osc24M |
| 2 | 5 | 11466 (unstable) | iosc/osc16M |
| 2 | 17 | 11422 (unstable) | iosc/osc16M |
| 3 | 5 | 85338 (stable) | pll-periph0 |
| 3 | 17 | 27167 (stable) | pll-periph0 |
The relative performance numbers all match up (with pll-periph0 running
at its default 600MHz).
Signed-off-by: Samuel Holland <samuel@sholland•org>
Signed-off-by: Maxime Ripard <maxime@cerno•tech>
Signed-off-by: Sasha Levin <sashal@kernel•org>
---
drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c
index 27554eaf69298..3f78035ff85af 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c
@@ -23,9 +23,9 @@
*/
static const char * const ar100_r_apb2_parents[] = { "osc24M", "osc32k",
- "pll-periph0", "iosc" };
+ "iosc", "pll-periph0" };
static const struct ccu_mux_var_prediv ar100_r_apb2_predivs[] = {
- { .index = 2, .shift = 0, .width = 5 },
+ { .index = 3, .shift = 0, .width = 5 },
};
static struct ccu_div ar100_clk = {
--
2.20.1
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next prev parent reply other threads:[~2020-01-24 14:28 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20200124142012.29752-1-sashal@kernel.org>
2020-01-24 14:19 ` [PATCH AUTOSEL 4.19 02/56] ARM: dts: meson8: fix the size of the PMU registers Sasha Levin
2020-01-24 14:19 ` [PATCH AUTOSEL 4.19 03/56] dt-bindings: reset: meson8b: fix duplicate reset IDs Sasha Levin
2020-01-24 14:19 ` [PATCH AUTOSEL 4.19 04/56] ARM: dts: sun8i: a83t: Correct USB3503 GPIOs polarity Sasha Levin
2020-01-24 14:19 ` [PATCH AUTOSEL 4.19 05/56] ARM: dts: am57xx-beagle-x15/am57xx-idk: Remove "gpios" for endpoint dt nodes Sasha Levin
2020-01-24 14:19 ` [PATCH AUTOSEL 4.19 06/56] ARM: dts: beagle-x15-common: Model 5V0 regulator Sasha Levin
2020-01-24 14:19 ` [PATCH AUTOSEL 4.19 07/56] soc: ti: wkup_m3_ipc: Fix race condition with rproc_boot Sasha Levin
2020-01-24 14:19 ` [PATCH AUTOSEL 4.19 09/56] ARM: dts: imx6q-dhcom: fix rtc compatible Sasha Levin
2020-01-24 14:19 ` [PATCH AUTOSEL 4.19 10/56] ARM: dts: imx6q-dhcom: Fix SGTL5000 VDDIO regulator connection Sasha Levin
2020-01-24 14:19 ` Sasha Levin [this message]
2020-01-24 14:19 ` [PATCH AUTOSEL 4.19 19/56] ARM: dts: imx7: Fix Toradex Colibri iMX7S 256MB NAND flash support Sasha Levin
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