Subject: Re: [PATCH] clk: imx: imx6ul: change flexcan clock to support CiA bitrates

From: Shawn Guo <[email-masked]>
Date: Tue, 17 Mar 2020 21:48:13 +0800

On Mon, Mar 16, 2020 at 09:58:28AM +0000, Waibel Georg wrote:
> On Mon, 16 Mar 2020 at 02:30, Shawn Guo <[email-masked]> wrote:
> > On Wed, Mar 11, 2020 at 12:03:40PM +0000, Waibel Georg wrote:
> > > Setting a CAN bitrate of 800kbit/s fails with a bitrate error of 1.3% if the
> > > flexcan module is clocked at 30MHz (CAN_CLK_ROOT). This patch changes the clock
> > > frequency from 30MHz to 40MHz which allows to support all bitrates recommended
> >
> > But code changes IMX6UL_CLK_PLL3_60M to IMX6UL_CLK_PLL3_80M?  Or
> > IMX6UL_CLK_CAN_SEL is different from CAN_CLK_ROOT in the context?
> 
> Correct. The patch sets CAN_CLK_SEL to 80MHZ. There is a post-divider
> CAN_CLK_PODF which is set  to /2 by default which makes the 40MHz
> CAN_CLK_ROOT.

Could you add this into commit log to make it clear?

Shawn

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