Subject: Re: Why is text_mutex used in jump_label_transform for x86_64

From: Peter Zijlstra <[email-masked]>
Date: Fri, 20 Mar 2020 11:27:09 +0100

On Thu, Mar 19, 2020 at 09:49:04PM +0800, chengjian (D) wrote:
> Hi，everyone
> 
> I'm sorry to disturb you. I have a problem about jump_label, and a bit
> confused about the code
> 
> I noticed that text_mutex is used in this function under x86_64
> architecture,
> but other architectures do not.
> 
> in arch/x86/kernel/jump_label.c
>         static void __ref jump_label_transform(struct jump_entry *entry,
>              enum jump_label_type type,
>              int init)
>         {
>          mutex_lock(&text_mutex);
>          __jump_label_transform(entry, type, init);
>          mutex_unlock(&text_mutex);
> 
> in arch/arm64/kernel/jump_label.c
> 
>         void arch_jump_label_transform(struct jump_entry *entry,
>                                        enum jump_label_type type)
>         {
>                 void *addr = (void *)jump_entry_code(entry);
>                 u32 insn;
> 
>                 if (type == JUMP_LABEL_JMP) {
>                         insn =
> aarch64_insn_gen_branch_imm(jump_entry_code(entry),
> jump_entry_target(entry),
> AARCH64_INSN_BRANCH_NOLINK);
>                 } else {
>                         insn = aarch64_insn_gen_nop();
>                 }
> 
>                 aarch64_insn_patch_text_nosync(addr, insn);
>         }
> 
> 
> Is there anything wrong with x86
> 
> or
> 
> is this missing for other architectures?

It depends on the architecture details of how self-modifying code works.
In particular, x86 is a variable instruction length architecture and
needs extreme care -- it's implementation requires there only be a
single text modifier at any one time, hence the use of text_mutex.

ARM64 OTOH is, like most RISC based architectures, a fixed width
instruction architecture. And in particular it can re-write certain
(branch) instructions with impunity (see their
aarch64_insn_patch_text_nosync()). Which is why they don't need
additional serialization.

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