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From: Jim Quinlan <james.quinlan@broadcom•com>
To: james.quinlan@broadcom•com,
	Nicolas Saenz Julienne <nsaenzjulienne@suse•de>
Cc: Rob Herring <robh@kernel•org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm•com>,
	"open list:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS"
	<linux-pci@vger•kernel.org>,
	open list <linux-kernel@vger•kernel.org>,
	Florian Fainelli <f.fainelli@gmail•com>,
	"maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE"
	<bcm-kernel-feedback-list@broadcom•com>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-rpi-kernel@lists•infradead.org>,
	Jim Quinlan <james.quinlan@broadcom•com>,
	Bjorn Helgaas <bhelgaas@google•com>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-arm-kernel@lists•infradead.org>
Subject: [PATCH 05/15] PCI: brcmstb: Add suspend and resume pm_ops
Date: Tue, 19 May 2020 16:34:03 -0400	[thread overview]
Message-ID: <20200519203419.12369-6-james.quinlan@broadcom.com> (raw)
In-Reply-To: <20200519203419.12369-1-james.quinlan@broadcom.com>

From: Jim Quinlan <jquinlan@broadcom•com>

Broadcom Set-top (BrcmSTB) boards typically support S2, S3,
and S5 suspend and resume.  This commit enables the PCIe
driver to do so.

Signed-off-by: Jim Quinlan <jquinlan@broadcom•com>
---
 drivers/pci/controller/pcie-brcmstb.c | 49 +++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index c1cf4ea7d3d9..39993203b991 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -972,6 +972,49 @@ static void brcm_pcie_turn_off(struct brcm_pcie *pcie)
 	brcm_pcie_bridge_sw_init_set(pcie, 1);
 }
 
+static int brcm_pcie_suspend(struct device *dev)
+{
+	struct brcm_pcie *pcie = dev_get_drvdata(dev);
+	int ret = 0;
+
+	brcm_pcie_turn_off(pcie);
+	clk_disable_unprepare(pcie->clk);
+
+	return ret;
+}
+
+static int brcm_pcie_resume(struct device *dev)
+{
+	struct brcm_pcie *pcie = dev_get_drvdata(dev);
+	void __iomem *base;
+	u32 tmp;
+	int ret;
+
+	base = pcie->base;
+	clk_prepare_enable(pcie->clk);
+
+	/* Take bridge out of reset so we can access the SERDES reg */
+	brcm_pcie_bridge_sw_init_set(pcie, 0);
+
+	/* SERDES_IDDQ = 0 */
+	tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
+	u32p_replace_bits(&tmp, 0,
+			  PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
+	writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
+
+	/* wait for serdes to be stable */
+	udelay(100);
+
+	ret = brcm_pcie_setup(pcie);
+	if (ret)
+		return ret;
+
+	if (pcie->msi)
+		brcm_msi_set_regs(pcie->msi);
+
+	return 0;
+}
+
 static void __brcm_pcie_remove(struct brcm_pcie *pcie)
 {
 	brcm_msi_remove(pcie);
@@ -1090,12 +1133,18 @@ static int brcm_pcie_probe(struct platform_device *pdev)
 
 MODULE_DEVICE_TABLE(of, brcm_pcie_match);
 
+static const struct dev_pm_ops brcm_pcie_pm_ops = {
+	.suspend_noirq = brcm_pcie_suspend,
+	.resume_noirq = brcm_pcie_resume,
+};
+
 static struct platform_driver brcm_pcie_driver = {
 	.probe = brcm_pcie_probe,
 	.remove = brcm_pcie_remove,
 	.driver = {
 		.name = "brcm-pcie",
 		.of_match_table = brcm_pcie_match,
+		.pm = &brcm_pcie_pm_ops,
 	},
 };
 module_platform_driver(brcm_pcie_driver);
-- 
2.17.1


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  parent reply	other threads:[~2020-05-19 20:35 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-19 20:33 [PATCH 00/15] PCI: brcmstb: enable PCIe for STB chips Jim Quinlan
2020-05-19 20:34 ` [PATCH 03/15] dt-bindings: PCI: Add bindings for more Brcmstb chips Jim Quinlan
2020-05-19 20:34 ` [PATCH 04/15] PCI: brcmstb: Add compatibily of other chips Jim Quinlan
2020-05-20 11:51   ` Nicolas Saenz Julienne
2020-05-20 14:30     ` Jim Quinlan
2020-05-20 14:41       ` Nicolas Saenz Julienne
2020-05-21 19:35     ` Jim Quinlan
2020-05-22  9:17       ` Nicolas Saenz Julienne
2020-05-19 20:34 ` Jim Quinlan [this message]
2020-05-19 20:34 ` [PATCH 06/15] PCI: brcmstb: Asserting PERST is different for 7278 Jim Quinlan
2020-05-19 20:34 ` [PATCH 07/15] PCI: brcmstb: Add control of rescal reset Jim Quinlan
2020-05-20  7:27   ` Philipp Zabel
2020-05-21 21:48     ` Jim Quinlan
2020-05-25 16:58       ` Florian Fainelli
2020-05-19 20:34 ` [PATCH 11/15] arm: dma-mapping: Invoke dma offset func if needed Jim Quinlan
2020-05-19 20:34 ` [PATCH 12/15] PCI: brcmstb: Set internal memory viewport sizes Jim Quinlan
2020-05-19 20:34 ` [PATCH 13/15] PCI: brcmstb: Accommodate MSI for older chips Jim Quinlan
2020-05-19 20:34 ` [PATCH 14/15] PCI: brcmstb: Set bus max burst side by chip type Jim Quinlan
2020-05-20 13:44   ` Nicolas Saenz Julienne
2020-05-20 14:27     ` Jim Quinlan
2020-05-19 20:34 ` [PATCH 15/15] PCI: brcmstb: add compatilbe chips to match list Jim Quinlan
2020-05-20 16:15 ` [PATCH 00/15] PCI: brcmstb: enable PCIe for STB chips Bjorn Helgaas

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