Re: [PATCH] arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES)

From: Catalin Marinas <catalin.marinas@arm•com>
To: Arnd Bergmann <arnd@arndb•de>
Cc: Mark Rutland <mark.rutland@arm•com>,
	Will Deacon <will@kernel•org>,
	Linux ARM <linux-arm-kernel@lists•infradead.org>,
	Android Kernel Team <kernel-team@android•com>,
	Ard Biesheuvel <ardb@kernel•org>,
	Vincent Whitchurch <vincent.whitchurch@axis•com>
Subject: Re: [PATCH] arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES)
Date: Tue, 1 Jun 2021 11:14:08 +0100	[thread overview]
Message-ID: <20210601101408.GA29312@arm.com> (raw)
In-Reply-To: <CAK8P3a286UUquL701GEu4P32yXdKsNccoMCdKdcs=ySSjOFyEg@mail.gmail.com>

On Fri, May 28, 2021 at 11:35:32AM +0200, Arnd Bergmann wrote:
> On Thu, May 27, 2021 at 3:19 PM Mark Rutland <mark.rutland@arm•com> wrote:
> > > More recently, it has been reported that a ARCH_DMA_MINALIGN of 128
> > > bytes wastes considerable memory (~6% immediately after boot on one
> > > system).
> > >
> > > Reduce ARCH_DMA_MINALIGN to 64 bytes and allow the warning/taint to
> > > indicate if there are machines that unknowingly rely on this.
> >
> > The rationale above makes sense to me, so:
> >
> > Acked-by: Mark Rutland <mark.rutland@arm•com>
> 
> I think it would make sense to go even further than this in the
> future, and allow
> setting a smaller minimum alignment depending what hardware is detected
> at boot time.

Yeah, we talked about this in the past. The problem is that very early
the kernel doesn't know whether it'll have devices that require
non-coherent DMA. So we'd probably need to start with a 64 byte
ARCH_DMA_MINALIGN and populate the slab caches slightly later once the
kernel learns more about the system it's running on.

-- 
Catalin

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