Subject: Re: [PATCH v4 04/11] perf/x86: Add barrier after updating bts

From: Peter Zijlstra <[email-masked]>
Date: Tue, 13 Jul 2021 15:01:54 +0200

On Sun, Jul 11, 2021 at 06:40:58PM +0800, Leo Yan wrote:
> Add barrier wmb() to separate the AUX data store and aux_head store.
> 
> Signed-off-by: Leo Yan <[email-masked]>
> ---
>  arch/x86/events/intel/bts.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c
> index 6320d2cfd9d3..4a015d160bc5 100644
> --- a/arch/x86/events/intel/bts.c
> +++ b/arch/x86/events/intel/bts.c
> @@ -209,6 +209,9 @@ static void bts_update(struct bts_ctx *bts)
>  	} else {
>  		local_set(&buf->data_size, head);
>  	}
> +
> +	/* The WMB separates data store and aux_head store matches. */
> +	wmb();

Alexander, last time you mentioned (on IRC) that BTS is supposed to be
coherent, in which case we can probably get away with just a compiler
barrier. Can you confirm?

That said; this BTS crud is so horrifically slow, an extra MFENCE isn't
going to matter one way or another.

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