Subject: Re: [PATCH 2/5] clk: stm32mp1: Add parent_data to ETHRX clock

From: Stephen Boyd <[email-masked]>
Date: Mon, 24 Jan 2022 17:16:29 -0800

Quoting Marek Vasut (2022-01-18 12:29:55)
> Pass parent_data to ETHRX clock with new fw_name = "ETH_RX_CLK/ETH_REF_CLK".
> By default, this change has no impact on the operation of the clock driver.
> However, due to the fw_name, it permits DT to override ETHRX clock parent,
> which might be needed in case the ETHRX clock are supplied by external clock
> source.
> 
> Example of MCO2 supplying clock to ETH_RX_CLK via external pad-to-pad wire:
> &rcc {
>          clocks = <&rcc CK_MCO2>;
>          clock-names = "ETH_RX_CLK/ETH_REF_CLK";
> };
> 
> Note that while this patch permits to implement this rare usecase, the issue
> with ethernet RX and TX input clock modeling on MP1 is far more complex and
> requires more core plumbing.
> 
> [1] STM32MP1 Reference Manual RM0436 Rev 3, Page 574,
>     Figure 83. Peripheral clock distribution for Ethernet
>     https://www.st.com/resource/en/reference_manual/dm00327659-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf
> 
> Signed-off-by: Marek Vasut <[email-masked]>
> Cc: Alexandre Torgue <[email-masked]>
> Cc: Christophe Roullier <[email-masked]>
> Cc: Gabriel Fernandez <[email-masked]>
> Cc: Patrice Chotard <[email-masked]>
> Cc: Patrick Delaunay <[email-masked]>
> Cc: Stephen Boyd <[email-masked]>
> Cc: [email-masked]
> Cc: [email-masked]
> To: [email-masked]
> ---

Applied to clk-next

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