From: Anup Patel <apatel@ventanamicro•com>
To: Palmer Dabbelt <palmer@dabbelt•com>,
Paul Walmsley <paul.walmsley@sifive•com>,
Albert Ou <aou@eecs•berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro•org>,
Ulf Hansson <ulf.hansson@linaro•org>,
"Rafael J . Wysocki" <rjw@rjwysocki•net>,
Pavel Machek <pavel@ucw•cz>, Rob Herring <robh+dt@kernel•org>
Cc: Sandeep Tripathy <milun.tripathy@gmail•com>,
Atish Patra <atishp@atishpatra•org>,
Alistair Francis <Alistair.Francis@wdc•com>,
Liush <liush@allwinnertech•com>, Anup Patel <anup@brainfault•org>,
devicetree@vger•kernel.org, linux-riscv@lists•infradead.org,
linux-kernel@vger•kernel.org, linux-pm@vger•kernel.org,
linux-arm-kernel@lists•infradead.org,
kvm-riscv@lists•infradead.org,
Anup Patel <apatel@ventanamicro•com>
Subject: [PATCH v10 8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine
Date: Wed, 26 Jan 2022 17:14:52 +0530 [thread overview]
Message-ID: <20220126114452.692512-9-apatel@ventanamicro.com> (raw)
In-Reply-To: <20220126114452.692512-1-apatel@ventanamicro.com>
From: Anup Patel <anup.patel@wdc•com>
We enable RISC-V SBI CPU Idle driver for QEMU virt machine to test
SBI HSM Supend on QEMU.
Signed-off-by: Anup Patel <anup.patel@wdc•com>
Signed-off-by: Anup Patel <apatel@ventanamicro•com>
---
arch/riscv/Kconfig.socs | 3 +++
arch/riscv/configs/defconfig | 1 +
arch/riscv/configs/rv32_defconfig | 1 +
3 files changed, 5 insertions(+)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 6ec44a22278a..f4097a815201 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -36,6 +36,9 @@ config SOC_VIRT
select GOLDFISH
select RTC_DRV_GOLDFISH if RTC_CLASS
select SIFIVE_PLIC
+ select PM_GENERIC_DOMAINS if PM
+ select PM_GENERIC_DOMAINS_OF if PM && OF
+ select RISCV_SBI_CPUIDLE if CPU_IDLE
help
This enables support for QEMU Virt Machine.
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index a5e0482a4969..b8c882b70b02 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y
CONFIG_SOC_VIRT=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
+CONFIG_PM=y
CONFIG_CPU_IDLE=y
CONFIG_VIRTUALIZATION=y
CONFIG_KVM=m
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index d1b87db54d68..6f9a7c89bff9 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y
CONFIG_ARCH_RV32I=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
+CONFIG_PM=y
CONFIG_CPU_IDLE=y
CONFIG_VIRTUALIZATION=y
CONFIG_KVM=m
--
2.25.1
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next prev parent reply other threads:[~2022-01-26 11:52 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-26 11:44 [PATCH v10 0/8] RISC-V CPU Idle Support Anup Patel
2022-01-26 11:44 ` [PATCH v10 1/8] RISC-V: Enable CPU_IDLE drivers Anup Patel
2022-02-08 6:16 ` Guo Ren
2022-02-09 5:15 ` Anup Patel
2022-02-09 6:00 ` Guo Ren
2022-02-09 5:20 ` Anup Patel
2022-01-26 11:44 ` [PATCH v10 2/8] RISC-V: Rename relocate() and make it global Anup Patel
2022-02-08 6:11 ` Guo Ren
2022-01-26 11:44 ` [PATCH v10 3/8] RISC-V: Add arch functions for non-retentive suspend entry/exit Anup Patel
2022-02-08 6:17 ` Guo Ren
2022-01-26 11:44 ` [PATCH v10 4/8] RISC-V: Add SBI HSM suspend related defines Anup Patel
2022-02-08 6:19 ` Guo Ren
2022-01-26 11:44 ` [PATCH v10 5/8] cpuidle: Factor-out power domain related code from PSCI domain driver Anup Patel
2022-01-26 11:44 ` [PATCH v10 6/8] cpuidle: Add RISC-V SBI CPU idle driver Anup Patel
2022-02-08 6:21 ` Guo Ren
2022-02-10 4:17 ` Anup Patel
2022-01-26 11:44 ` [PATCH v10 7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states Anup Patel
2022-02-08 6:20 ` Guo Ren
2022-01-26 11:44 ` Anup Patel [this message]
2022-02-08 6:26 ` [PATCH v10 8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine Guo Ren
2022-02-08 8:48 ` Anup Patel
2022-02-08 6:46 ` Guo Ren
2022-02-08 8:54 ` Anup Patel
2022-02-08 10:17 ` Guo Ren
2022-02-08 13:25 ` Anup Patel
2022-02-08 14:52 ` Guo Ren
2022-02-08 16:16 ` Anup Patel
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