From: LW@KARO-electronics•de (Lothar Waßmann)
To: linux-arm-kernel@lists•infradead.org
Subject: mxs: enable phy-clock in the driver?
Date: Mon, 9 Jan 2012 07:40:47 +0100 [thread overview]
Message-ID: <20234.35823.411762.856482@ipc1.ka-ro> (raw)
In-Reply-To: <20120109013404.GD1835@S2101-09.ap.freescale.net>
Hi,
Shawn Guo writes:
> On Sun, Jan 08, 2012 at 03:45:58PM +0100, Wolfram Sang wrote:
> > Hi Shawn,
> >
> > I recently noticed that my tx28 board did not have net when booting from NAND
> > (before that, barebox was setting up the network). Adding lines like these from
> > mx28evk helped:
> >
> > 228 /* Enable fec phy clock */
> > 229 clk = clk_get_sys("pll2", NULL);
> > 230 if (!IS_ERR(clk))
> > 231 clk_enable(clk);
> >
> > So, if every board seems to need this, I'd think this should rather be in the
> > driver? Am I correct or is there something I have overlooked?
> >
> Hmm, as far as I know, at least m28evk from denx does not need this.
> Different from that imx28 supplies clock to phy on mx28evk board,
> m28evk has phy supply clock to imx28.
>
The TX28 derives its PHY clock from the ENET_CLK pin of the
processor. Thus the CLK_ENET_TIME should be enabled by the driver as
mentioned in <20120108033238.GA19721@S2101-09•ap.freescale.net>
Lothar Wa?mann
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next prev parent reply other threads:[~2012-01-09 6:40 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-08 14:45 mxs: enable phy-clock in the driver? Wolfram Sang
2012-01-09 1:34 ` Shawn Guo
2012-01-09 6:40 ` Lothar Waßmann [this message]
2012-01-09 6:58 ` Shawn Guo
2012-01-09 7:05 ` Lothar Waßmann
2012-01-09 7:21 ` Shawn Guo
2012-01-09 7:17 ` Lothar Waßmann
2012-01-11 10:59 ` Marek Vasut
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