From: Mostafa Saleh <smostafa@google•com>
To: linux-arm-kernel@lists•infradead.org,
linux-kernel@vger•kernel.org, kvmarm@lists•linux.dev,
iommu@lists•linux.dev
Cc: catalin.marinas@arm•com, will@kernel•org, maz@kernel•org,
oliver.upton@linux•dev, joey.gouly@arm•com,
suzuki.poulose@arm•com, yuzenghui@huawei•com, joro@8bytes•org,
jean-philippe@linaro•org, jgg@ziepe•ca, mark.rutland@arm•com,
qperret@google•com, tabba@google•com, vdonnefort@google•com,
sebastianene@google•com, keirf@google•com,
Mostafa Saleh <smostafa@google•com>
Subject: [PATCH v6 20/25] iommu/arm-smmu-v3-kvm: Share other queues
Date: Fri, 1 May 2026 11:19:22 +0000 [thread overview]
Message-ID: <20260501111928.259252-21-smostafa@google.com> (raw)
In-Reply-To: <20260501111928.259252-1-smostafa@google.com>
Other queues as PRIQ and EVTQ doesn't need to be shadowed. However, we
need to make sure they are in a state that disallow them to be donated
to the hypervisor or guests. So, keep track of those and share them when
they get enabled.
Signed-off-by: Mostafa Saleh <smostafa@google•com>
---
.../iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c | 62 ++++++++++++++++++-
.../iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h | 4 ++
2 files changed, 64 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
index d92811ef2af5..e258690384f4 100644
--- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c
@@ -69,6 +69,16 @@ static bool is_smmu_enabled(struct hyp_arm_smmu_v3_device *smmu)
return FIELD_GET(CR0_SMMUEN, smmu->cr0);
}
+static bool is_evtq_enabled(struct hyp_arm_smmu_v3_device *smmu)
+{
+ return FIELD_GET(CR0_EVTQEN, smmu->cr0);
+}
+
+static bool is_priq_enabled(struct hyp_arm_smmu_v3_device *smmu)
+{
+ return FIELD_GET(CR0_PRIQEN, smmu->cr0);
+}
+
/*
* CMDQ, STE host copies are accessed by the hypervisor, we share them to
* - Prevent the host from passing protected VM memory.
@@ -647,6 +657,14 @@ static void smmu_emulate_cmdq_disable(struct hyp_arm_smmu_v3_device *smmu)
cmdq_size(&smmu->cmdq_host)));
}
+static void smmu_emulate_queue(unsigned long q_base, size_t ent_size_shift)
+{
+ phys_addr_t base = q_base & Q_BASE_ADDR_MASK;
+ size_t size = 1UL << (FIELD_GET(Q_BASE_LOG2SIZE, q_base) + ent_size_shift);
+
+ WARN_ON(smmu_share_pages(base ,size));
+}
+
static bool smmu_dabt_device(struct hyp_arm_smmu_v3_device *smmu,
struct user_pt_regs *regs,
u64 esr, u32 off)
@@ -748,12 +766,31 @@ static bool smmu_dabt_device(struct hyp_arm_smmu_v3_device *smmu,
if (is_write) {
bool last_cmdq_en = is_cmdq_enabled(smmu);
bool last_smmu_en = is_smmu_enabled(smmu);
+ bool last_evtq_en = is_evtq_enabled(smmu);
+ bool last_priq_en = is_priq_enabled(smmu);
smmu->cr0 = val;
if (!last_cmdq_en && is_cmdq_enabled(smmu))
smmu_emulate_cmdq_enable(smmu);
else if (last_cmdq_en && !is_cmdq_enabled(smmu))
smmu_emulate_cmdq_disable(smmu);
+
+ /*
+ * Share PRI and EVTQ to avoid the host using them to write to
+ * protected memory. However, panic on disable for those queues
+ * as that is more complicated, unsharing from here can lead to
+ * use-after-unshare issues, and requires ordering with cr0ack.
+ * As the host never disable those queues, don't support that.
+ */
+ if (!last_evtq_en && is_evtq_enabled(smmu))
+ smmu_emulate_queue(smmu->evtq_base, EVTQ_ENT_SZ_SHIFT);
+ else if (last_evtq_en && !is_evtq_enabled(smmu))
+ WARN_ON(1);
+ if (!last_priq_en && is_priq_enabled(smmu))
+ smmu_emulate_queue(smmu->priq_base, PRIQ_ENT_SZ_SHIFT);
+ else if (last_priq_en && !is_priq_enabled(smmu))
+ WARN_ON(1);
+
if (!last_smmu_en && is_smmu_enabled(smmu))
smmu_emulate_enable(smmu);
else if (last_smmu_en && !is_smmu_enabled(smmu))
@@ -779,6 +816,29 @@ static bool smmu_dabt_device(struct hyp_arm_smmu_v3_device *smmu,
mask = read_write;
break;
}
+ case ARM_SMMU_EVTQ_BASE:
+ if (len != sizeof(u64))
+ break;
+
+ if (is_write) {
+ if (is_evtq_enabled(smmu))
+ break;
+ smmu->evtq_base = val;
+ }
+ mask = read_write;
+ break;
+
+ case ARM_SMMU_PRIQ_BASE:
+ if (len != sizeof(u64))
+ break;
+
+ if (is_write) {
+ if (is_priq_enabled(smmu))
+ break;
+ smmu->priq_base = val;
+ }
+ mask = read_write;
+ break;
/* Allowed 32 bit registers. */
case ARM_SMMU_EVTQ_PROD + SZ_64K:
@@ -801,9 +861,7 @@ static bool smmu_dabt_device(struct hyp_arm_smmu_v3_device *smmu,
mask = read_write;
break;
/* Allowed 64 bit registers. */
- case ARM_SMMU_EVTQ_BASE:
case ARM_SMMU_EVTQ_IRQ_CFG0:
- case ARM_SMMU_PRIQ_BASE:
case ARM_SMMU_PRIQ_IRQ_CFG0:
case ARM_SMMU_GERROR_IRQ_CFG0:
if (len != sizeof(u64))
diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h
index 6a73cf6b8873..e811d51bdfaa 100644
--- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h
@@ -30,6 +30,8 @@
* @host_ste_cfg Host stream table config
* @host_ste_base Host stream table base
* @strtab_cfg Stream table as seen by HW
+ * @evtq_base Host evtq base reg
+ * @priq_base Host priq base reg
*/
struct hyp_arm_smmu_v3_device {
phys_addr_t mmio_addr;
@@ -52,6 +54,8 @@ struct hyp_arm_smmu_v3_device {
u64 host_ste_cfg;
u64 host_ste_base;
struct arm_smmu_strtab_cfg strtab_cfg;
+ unsigned long evtq_base;
+ unsigned long priq_base;
};
extern size_t kvm_nvhe_sym(kvm_hyp_arm_smmu_v3_count);
--
2.54.0.545.g6539524ca2-goog
next prev parent reply other threads:[~2026-05-01 11:20 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-01 11:19 [PATCH v6 00/25] KVM: arm64: SMMUv3 driver for pKVM (trap and emulate) Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 01/25] KVM: arm64: Generalize trace clock Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 02/25] KVM: arm64: Donate MMIO to the hypervisor Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 03/25] iommu/arm-smmu-v3: Split code with hyp Mostafa Saleh
2026-05-01 12:44 ` Jason Gunthorpe
2026-05-04 12:13 ` Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 04/25] iommu/arm-smmu-v3: Move TLB range invalidation into common code Mostafa Saleh
2026-05-01 12:41 ` Jason Gunthorpe
2026-05-04 12:15 ` Mostafa Saleh
2026-05-05 16:17 ` Jason Gunthorpe
2026-05-05 16:43 ` Mostafa Saleh
2026-05-06 9:53 ` Jason Gunthorpe
2026-05-07 9:40 ` Mostafa Saleh
2026-05-09 23:29 ` Jason Gunthorpe
2026-05-11 11:45 ` Mostafa Saleh
2026-05-11 14:24 ` Jason Gunthorpe
2026-05-01 11:19 ` [PATCH v6 05/25] iommu/arm-smmu-v3: Move IDR parsing to common functions Mostafa Saleh
2026-05-01 12:47 ` Jason Gunthorpe
2026-05-04 12:16 ` Mostafa Saleh
2026-05-05 16:27 ` Jason Gunthorpe
2026-05-05 16:48 ` Mostafa Saleh
2026-05-06 9:56 ` Jason Gunthorpe
2026-05-07 10:13 ` Mostafa Saleh
2026-05-09 23:34 ` Jason Gunthorpe
2026-05-11 11:53 ` Mostafa Saleh
2026-05-11 14:30 ` Jason Gunthorpe
2026-05-01 11:19 ` [PATCH v6 06/25] iommu/io-pgtable-arm: Rework to use the iommu-pages API Mostafa Saleh
2026-05-01 12:24 ` Jason Gunthorpe
2026-05-04 12:19 ` Mostafa Saleh
2026-05-09 23:21 ` Jason Gunthorpe
2026-05-11 11:16 ` Mostafa Saleh
2026-05-11 14:18 ` Jason Gunthorpe
2026-05-13 21:54 ` Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 07/25] KVM: arm64: iommu: Introduce IOMMU driver infrastructure Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 08/25] KVM: arm64: iommu: Shadow host stage-2 page table Mostafa Saleh
2026-05-01 13:00 ` Jason Gunthorpe
2026-05-04 12:28 ` Mostafa Saleh
2026-05-09 23:27 ` Jason Gunthorpe
2026-05-11 11:24 ` Mostafa Saleh
2026-05-11 14:22 ` Jason Gunthorpe
2026-05-12 10:42 ` Mostafa Saleh
2026-05-12 12:36 ` Jason Gunthorpe
2026-05-01 11:19 ` [PATCH v6 09/25] KVM: arm64: iommu: Add memory pool Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 10/25] KVM: arm64: iommu: Support DABT for IOMMU Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 11/25] iommu/arm-smmu-v3-kvm: Add SMMUv3 driver Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 12/25] iommu/arm-smmu-v3-kvm: Add the kernel driver Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 13/25] iommu/arm-smmu-v3-kvm: Probe SMMU HW Mostafa Saleh
2026-05-01 12:51 ` Jason Gunthorpe
2026-05-04 12:30 ` Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 14/25] iommu/arm-smmu-v3-kvm: Add MMIO emulation Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 15/25] iommu/arm-smmu-v3-kvm: Shadow the command queue Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 16/25] iommu/arm-smmu-v3-kvm: Add CMDQ functions Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 17/25] iommu/arm-smmu-v3-kvm: Emulate CMDQ for host Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 18/25] iommu/arm-smmu-v3-kvm: Shadow stream table Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 19/25] iommu/arm-smmu-v3-kvm: Shadow STEs Mostafa Saleh
2026-05-01 11:19 ` Mostafa Saleh [this message]
2026-05-01 11:19 ` [PATCH v6 21/25] iommu/arm-smmu-v3-kvm: Emulate GBPA Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 22/25] iommu/io-pgtable-arm: Support io-pgtable-arm in the hypervisor Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 23/25] iommu/arm-smmu-v3-kvm: Shadow the CPU stage-2 page table Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 24/25] iommu/arm-smmu-v3-kvm: Enable nesting Mostafa Saleh
2026-05-01 11:19 ` [PATCH v6 25/25] KVM: arm64: Add documentation for pKVM DMA isolation Mostafa Saleh
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