Subject: Re: [PATCH 5/8] dt-bindings: arm: ras: Introduce bindings for ARM AEST

From: Rob Herring <[email-masked]>
Date: Wed, 13 May 2026 12:58:23 -0500

On Tue, May 05, 2026 at 05:53:49PM +0530, Umang Chheda wrote:
> The Arm Error Source Table (AEST) specification describes how firmware
> exposes RAS error source topology to the operating system. On ACPI
> systems this information is provided via the AEST ACPI table.
> 
> Introduce Device Tree bindings that provide an equivalent description
> of AEST error sources for DT-based platforms.
> 
> Signed-off-by: Umang Chheda <[email-masked]>
> ---
>  .../devicetree/bindings/arm/arm,aest.yaml          | 406 +++++++++++++++++++++
>  include/dt-bindings/arm/aest.h                     |  43 +++
>  2 files changed, 449 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/arm,aest.yaml b/Documentation/devicetree/bindings/arm/arm,aest.yaml
> new file mode 100644
> index 000000000000..7809a0d38270
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/arm,aest.yaml
> @@ -0,0 +1,406 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/arm,aest.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Arm Error Source Table (AEST)
> +
> +maintainers:
> +  - Umang Chheda <[email-masked]>
> +
> +description:
> +  The Arm Error Source Table (AEST) describes RAS error sources and their
> +  register interfaces. Each error source exposes one or more error records
> +  through either system registers or a memory-mapped register window, and
> +  may signal errors via interrupts. The top-level node acts as a container
> +  for one or more child nodes, each describing a single AEST error source.
> +  Refer to the Arm AEST specification (DEN0085 / DDI 0587B) for details.
> +  Flag bit constants for use in DT source files are defined in
> +  <dt-bindings/arm/aest.h>.
> +
> +properties:
> +  compatible:
> +    const: arm,aest
> +
> +  "#address-cells":
> +    const: 2
> +
> +  "#size-cells":
> +    const: 2
> +
> +  ranges: true
> +
> +required:
> +  - compatible
> +
> +additionalProperties: false
> +
> +patternProperties:
> +  "^aest-[a-z0-9-]+(@[0-9a-f]+)?$":
> +    type: object
> +    description:
> +      An AEST error source node describing one error source defined by
> +      the Arm AEST specification.
> +
> +    properties:
> +      compatible:
> +        description:
> +          Identifies the type of AEST error source. Each value corresponds to
> +          a distinct error source class defined by the Arm AEST specification.
> +          arm,aest-proxy represents a proxy error source that forwards errors
> +          from another error source.
> +        enum:
> +          - arm,aest-processor
> +          - arm,aest-memory
> +          - arm,aest-smmu
> +          - arm,aest-gic
> +          - arm,aest-pcie
> +          - arm,aest-vendor
> +          - arm,aest-proxy

This is a fundamental difference how DT and ACPI get structured. ACPI 
defines new table for some feature and puts everything in that table. 
For DT, these all belong in the node for the corresponding h/w. For 
example, if the GIC supports AEST, then that belongs in the GIC node. 

> +
> +      reg:
> +        description:
> +          Register ranges for the error source. Absence of reg implies
> +          system-register access (interface type 0). A single range implies
> +          memory-mapped access (interface type 1). Two ranges imply
> +          single-record memory-mapped access (interface type 2).
> +        minItems: 1
> +        maxItems: 4
> +
> +      reg-names:
> +        description:
> +          Names for the register ranges. The base error-record window is
> +          unnamed (or first entry). Optional named ranges provide access to
> +          the fault-injection, error-group, and interrupt-config register
> +          windows defined by the AEST specification.
> +        minItems: 1
> +        maxItems: 4
> +        items:
> +          enum:
> +            - fault-inject
> +            - err-group
> +            - irq-config
> +
> +      interrupts:
> +        description: Interrupts associated with the error source.
> +        minItems: 1
> +        maxItems: 2
> +
> +      interrupt-names:
> +        description: Names of the interrupts associated with the error source.
> +        minItems: 1
> +        maxItems: 2
> +        items:
> +          enum:
> +            - fhi
> +            - eri
> +
> +      arm,fhi-flags:
> +        description:
> +          Bitmask of flags for the fault-handling interrupt (FHI), as defined
> +          in the AEST node interrupt structure flags field. Constants are
> +          defined in <dt-bindings/arm/aest.h> - AEST_IRQ_MODE_LEVEL (0),
> +          AEST_IRQ_MODE_EDGE (1).

DT already has a way to define interrupt flags. Why invent something 
new?

Rob