From: Marc Zyngier <maz@kernel•org>
To: kvmarm@lists•linux.dev, linux-arm-kernel@lists•infradead.org
Cc: Steffen Eiden <seiden@linux•ibm.com>,
Joey Gouly <joey.gouly@arm•com>,
Suzuki K Poulose <suzuki.poulose@arm•com>,
Oliver Upton <oupton@kernel•org>,
Zenghui Yu <yuzenghui@huawei•com>,
Sascha Bischoff <sascha.bischoff@arm•com>
Subject: [PATCH v2 08/18] KVM: arm64: vgic: Rationalise per-CPU irq accessor
Date: Wed, 20 May 2026 10:19:39 +0100 [thread overview]
Message-ID: <20260520091949.542365-9-maz@kernel.org> (raw)
In-Reply-To: <20260520091949.542365-1-maz@kernel.org>
Despite adding the necessary infrastructure to identify irq types,
vgic_get_vcpu_irq() treats GICv5 PPIs in a special way, which
impairs the readability of the code.
Use the existing irq classifiers to handle per-CPU irqs for all
vgic types, and let the normal control flow reach global interrupt
handling without any v5-specific path.
Reviewed-by: Joey Gouly <joey.gouly@arm•com>
Signed-off-by: Marc Zyngier <maz@kernel•org>
---
arch/arm64/kvm/vgic/vgic.c | 25 ++++++++++++-------------
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/kvm/vgic/vgic.c b/arch/arm64/kvm/vgic/vgic.c
index 3ac6d49bc4876..b697678d68b01 100644
--- a/arch/arm64/kvm/vgic/vgic.c
+++ b/arch/arm64/kvm/vgic/vgic.c
@@ -106,24 +106,23 @@ struct vgic_irq *vgic_get_irq(struct kvm *kvm, u32 intid)
struct vgic_irq *vgic_get_vcpu_irq(struct kvm_vcpu *vcpu, u32 intid)
{
+ enum kvm_device_type type;
+
if (WARN_ON(!vcpu))
return NULL;
- if (vgic_is_v5(vcpu->kvm)) {
- u32 int_num, hwirq_id;
-
- if (!__irq_is_ppi(KVM_DEV_TYPE_ARM_VGIC_V5, intid))
- return NULL;
-
- hwirq_id = FIELD_GET(GICV5_HWIRQ_ID, intid);
- int_num = array_index_nospec(hwirq_id, VGIC_V5_NR_PRIVATE_IRQS);
+ type = vcpu->kvm->arch.vgic.vgic_model;
- return &vcpu->arch.vgic_cpu.private_irqs[int_num];
- }
+ if (__irq_is_sgi(type, intid) || __irq_is_ppi(type, intid)) {
+ switch (type) {
+ case KVM_DEV_TYPE_ARM_VGIC_V5:
+ intid = vgic_v5_get_hwirq_id(intid);
+ intid = array_index_nospec(intid, VGIC_V5_NR_PRIVATE_IRQS);
+ break;
+ default:
+ intid = array_index_nospec(intid, VGIC_NR_PRIVATE_IRQS);
+ }
- /* SGIs and PPIs */
- if (intid < VGIC_NR_PRIVATE_IRQS) {
- intid = array_index_nospec(intid, VGIC_NR_PRIVATE_IRQS);
return &vcpu->arch.vgic_cpu.private_irqs[intid];
}
--
2.47.3
next prev parent reply other threads:[~2026-05-20 9:20 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-20 9:19 [PATCH v2 00/18] KVM: arm64: vgic-v5 fixes for 7.2 Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 01/18] KVM: arm64: vgic-v5: Add for_each_visible_v5_ppi() iterator Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 02/18] KVM: arm64: vgic-v5: Move PPI caps into kvm_vgic_global_state Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 03/18] KVM: arm64: vgic-v5: Remove use of __assign_bit() with a constant Marc Zyngier
2026-05-20 13:26 ` Joey Gouly
2026-05-20 9:19 ` [PATCH v2 04/18] KVM: arm64: vgic-v5: Drop pointless ARM64_HAS_GICV5_CPUIF check Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 05/18] KVM: arm64: vgic: Constify struct irq_ops usage Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 06/18] KVM: arm64: vgic: Consolidate vgic_allocate_private_irqs_locked() Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 07/18] KVM: arm64: vgic-v5: Drop defensive checks from vgic_v5_ppi_queue_irq_unlock() Marc Zyngier
2026-05-20 9:19 ` Marc Zyngier [this message]
2026-05-20 9:19 ` [PATCH v2 09/18] KVM: arm64: vgic-v5: Limit support to 64 PPIs Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 10/18] KVM: arm64: vgic-v5: Add missing trap handing for NV triage Marc Zyngier
2026-05-20 13:54 ` Joey Gouly
2026-05-20 9:19 ` [PATCH v2 11/18] KVM: arm64: vgic-v5: Atomically assign bits to PPI DVI bitmap Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 12/18] KVM: arm64: selftests: Add missing GIC CDEN to no-vgic-v5 selftest Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 13/18] KVM: arm64: selftests: Cleanup unused vars in GICv5 PPI selftest Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 14/18] KVM: arm64: selftests: Improve error handling for " Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 15/18] Documentation: KVM: Fix typos in VGICv5 documentation Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 16/18] Documentation: KVM: Clarify that PMU_V3_IRQ IntID requirements for GICv5 Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 17/18] irqchip/gic-v5: Immediately exec priority drop following activate Marc Zyngier
2026-05-20 9:19 ` [PATCH v2 18/18] KVM: arm64: Fix arch timer interrupts for GICv3-on-GICv5 guests Marc Zyngier
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