On Fri, May 29, 2026 at 12:52:59AM +0300, Stefan Dösinger wrote:
> +properties:
> +  compatible:
> +    const: zte,zx297520v3-lspclk
> +
> +  clocks:
> +    items:
> +      - description: Main PLL divided by 5 output from topclk (124.8 MHz)
> +      - description: Main PLL divided by 4 output from topclk (156 MHz)
> +      - description: Main PLL divided by 6 output from topclk (104 MHz)
> +      - description: Main PLL divided by 8 output from topclk (78 MHz)
> +      - description: Main PLL divided by 12 output from topclk (52 MHz)
> +      - description: Main oscillator output from topclk (26 MHz)
> +      - description: Timer oscillator output from topclk (32 KHz)
> +      - description: LSP pclk output from topclk (26 MHz)
> +      - description: TDM wclk mux output from topclk
> +      - description: DPLL divided by 4 output from topclk (122.88 MHz)
> +
> +  clock-names:
> +    items:
> +      - const: mpll_d5
> +      - const: mpll_d4
> +      - const: mpll_d6
> +      - const: mpll_d8
> +      - const: mpll_d12
> +      - const: osc26m
> +      - const: osc32k
> +      - const: pclk
> +      - const: tdm_wclk
> +      - const: dpll_d4
> +
> +  "#clock-cells":
> +    const: 1
> +
> +  "#reset-cells":
> +    const: 1
> +
> +  reg:
> +    items:
> +      - description: IO memory region of the LSP controller

Just make this "maxItems: 1".

Also, sort reg after compatible please.

Same comments apply here about the example and using _END defines.

pw-bot: changes-requested

Cheers,
Conor.