From: Jun Yan <jerrysteve1101@gmail•com>
To: Rob Herring <robh@kernel•org>,
Krzysztof Kozlowski <krzk+dt@kernel•org>,
Conor Dooley <conor+dt@kernel•org>,
Neil Armstrong <neil.armstrong@linaro•org>,
Kevin Hilman <khilman@baylibre•com>,
Jerome Brunet <jbrunet@baylibre•com>,
Martin Blumenstingl <martin.blumenstingl@googlemail•com>,
Arseniy Krasnov <avkrasnov@salutedevices•com>
Cc: Jun Yan <jerrysteve1101@gmail•com>,
devicetree@vger•kernel.org, linux-arm-kernel@lists•infradead.org,
linux-amlogic@lists•infradead.org, linux-kernel@vger•kernel.org
Subject: [PATCH 3/3] arm64: dts: amlogic: meson-axg-s400: Enable pcie_phy
Date: Fri, 29 May 2026 22:05:59 +0800 [thread overview]
Message-ID: <20260529140605.1070764-4-jerrysteve1101@gmail.com> (raw)
In-Reply-To: <20260529140605.1070764-1-jerrysteve1101@gmail.com>
The meson-axg dtsi now disables pcie_phy by default, so enable it
for the s400 board to support PCIe functionality.
Signed-off-by: Jun Yan <jerrysteve1101@gmail•com>
---
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
index 285c6ac1dd61..7ba249cc3d56 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
@@ -448,6 +448,10 @@ &pcieB {
status = "okay";
};
+&pcie_phy {
+ status = "okay";
+};
+
&pwm_ab {
status = "okay";
pinctrl-0 = <&pwm_a_x20_pins>;
--
2.54.0
prev parent reply other threads:[~2026-05-29 14:06 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-29 14:05 [PATCH 0/3] arm64: dts: amlogic: meson-axg: NAND fix and PCIe PHY adjustment Jun Yan
2026-05-29 14:05 ` [PATCH 1/3] arm64: dts: amlogic: meson-axg: Add missing nand_rb0 pin to nand_all_pins Jun Yan
2026-05-29 14:05 ` [PATCH 2/3] arm64: dts: amlogic: meson-axg: Disable pcie_phy node by default Jun Yan
2026-05-29 14:05 ` Jun Yan [this message]
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