From: Alex Elder <elder@riscstar•com>
To: andrew+netdev@lunn•ch, davem@davemloft•net, edumazet@google•com,
kuba@kernel•org, pabeni@redhat•com,
maxime.chevallier@bootlin•com, rmk+kernel@armlinux•org.uk,
andersson@kernel•org, konradybcio@kernel•org, robh@kernel•org,
krzk+dt@kernel•org, conor+dt@kernel•org, linusw@kernel•org,
brgl@kernel•org, arnd@arndb•de, gregkh@linuxfoundation•org
Cc: Daniel Thompson <daniel@riscstar•com>,
elder@riscstar•com, mohd.anwar@oss•qualcomm.com,
a0987203069@gmail•com, alexandre.torgue@foss•st.com,
ast@kernel•org, boon.khai.ng@altera•com, chenchuangyu@xiaomi•com,
chenhuacai@kernel•org, daniel@iogearbox•net, hawk@kernel•org,
hkallweit1@gmail•com, inochiama@gmail•com,
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weishangjuan@eswincomputing•com, wens@kernel•org,
netdev@vger•kernel.org, bpf@vger•kernel.org,
linux-arm-msm@vger•kernel.org, devicetree@vger•kernel.org,
linux-gpio@vger•kernel.org,
linux-stm32@st-md-mailman•stormreply.com,
linux-arm-kernel@lists•infradead.org,
linux-kernel@vger•kernel.org
Subject: [PATCH net-next v2 05/14] net: pcs: pcs-xpcs: select operating mode for 10G-baseR capable PCS
Date: Thu, 4 Jun 2026 20:00:12 -0500 [thread overview]
Message-ID: <20260605010022.968612-6-elder@riscstar.com> (raw)
In-Reply-To: <20260605010022.968612-1-elder@riscstar.com>
From: Daniel Thompson <daniel@riscstar•com>
Currently the XPCS found on Toshiba TC9564 (a.k.a. Qualcomm QPS615)
is unable to operate at 2500base-X and slower with a PHY connected
using SGMII/2500base-X (in our case a Qualcomm QCA8081).
The problem arises because this XPCS supports 10Gbase-R. That means that
the reset value of SR_XS_PCS_CTRL2:PCS_TYPE_SEL (0) is valid and this
suppresses the modal switching based on bit 13 of SR_PMA_CTRL1 or
SR_XS_PCS_CTRL1.
A fix for this behaviour is already implemented by
txgbe_xpcs_switch_mode() as part of the quirks for WangXun devices.
Rather than introduce another quirk for TC956x let's attempt so solve
this generically by setting SR_XS_PCS_CTRL2:PCS_TYPE_SEL to a reserved
value when we detect the right we detect the right combination of phy
interface and XPCS feature support.
The generic strategy adopted requires the default value of PCS_TYPE_SEL
to be 0 on devices that support 10Gbase-R. Based on TC9564 documentation
and the logic already implemented for WangXun I believe this is likely
to be the case for currently supported XPCS devices. Sadly I don't have
access to generic XPCS docs to confirm. However I think the benefits
of avoiding a cargo culted quirk outweights the risk of regression.
Signed-off-by: Daniel Thompson <daniel@riscstar•com>
Signed-off-by: Alex Elder <elder@riscstar•com>
---
drivers/net/pcs/pcs-xpcs.c | 39 ++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c
index 76c04372b5b50..e58103ae8dadd 100644
--- a/drivers/net/pcs/pcs-xpcs.c
+++ b/drivers/net/pcs/pcs-xpcs.c
@@ -705,10 +705,49 @@ static void xpcs_get_interfaces(struct dw_xpcs *xpcs, unsigned long *interfaces)
static int xpcs_switch_interface_mode(struct dw_xpcs *xpcs,
phy_interface_t interface)
{
+ int mdio_stat2, ret;
+
/* Wangxun provides a full alternative implementation to handle quirks */
if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID)
return txgbe_xpcs_switch_mode(xpcs, interface);
+ mdio_stat2 = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT2);
+ if (mdio_stat2 < 0)
+ return mdio_stat2;
+
+ /*
+ * If this XPCS supports 10Gbase-R then that will be the default
+ * operating mode. There are several interface modes where this default
+ * is unhelpful. Change the operating mode for interfaces were we know
+ * the default is wrong, and restore the default otherwise.
+ */
+ if (mdio_stat2 & MDIO_PCS_STAT2_10GBR) {
+ switch (interface) {
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_1000BASEX:
+ case PHY_INTERFACE_MODE_2500BASEX:
+ /*
+ * Why are we writing MDIO_PCS_CTRL2_TYPE + 1? We want
+ * the modal behaviour that comes when we pick a
+ * reserved value. XPCS allocates extra bits to this
+ * field and allocates values from 15 down so
+ * MDIO_PCS_CTRL2_TYPE + 1 is the value likely to be
+ * allocated last (and hopefully never).
+ */
+ ret = xpcs_write(xpcs, MDIO_MMD_PCS, MDIO_CTRL2,
+ MDIO_PCS_CTRL2_TYPE + 1);
+ if (ret < 0)
+ return ret;
+ break;
+ default:
+ ret = xpcs_write(xpcs, MDIO_MMD_PCS, MDIO_CTRL2,
+ MDIO_PCS_CTRL2_10GBR);
+ if (ret < 0)
+ return ret;
+ break;
+ }
+ }
+
xpcs->interface = interface;
return 0;
--
2.51.0
next prev parent reply other threads:[~2026-06-05 1:00 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-05 1:00 [PATCH net-next v2 00/14] net: enable TC956x support Alex Elder
2026-06-05 1:00 ` [PATCH net-next v2 01/14] dt-bindings: net: qca,qca808x: Add regulator properties Alex Elder
2026-06-05 1:00 ` [PATCH net-next v2 02/14] net: phy: qcom: qca808x: Add regulator management Alex Elder
2026-06-05 1:00 ` [PATCH net-next v2 03/14] net: pcs: pcs-xpcs-regmap: support XPCS memory-mapped MDIO bus via regmap Alex Elder
2026-06-05 1:00 ` [PATCH net-next v2 04/14] net: pcs: xpcs: re-order xpcs_pre_config() to update after the reset Alex Elder
2026-06-05 1:00 ` Alex Elder [this message]
2026-06-05 1:00 ` [PATCH net-next v2 06/14] net: stmmac: dma: create a separate dma_device pointer Alex Elder
2026-06-05 1:00 ` [PATCH net-next v2 07/14] net: stmmac: dwxgmac2: Add multi MSI interrupt mode Alex Elder
2026-06-05 1:00 ` [PATCH net-next v2 08/14] net: stmmac: dwxgmac2: Add XGMAC 3.01a support Alex Elder
2026-06-05 1:00 ` [PATCH net-next v2 09/14] net: stmmac: dwxgmac2: export symbols for XGMAC 3.01a DMA Alex Elder
2026-06-05 1:00 ` [PATCH net-next v2 10/14] dt-bindings: net: toshiba,tc9654-dwmac: add TC9564 Ethernet bridge Alex Elder
2026-06-05 2:40 ` Rob Herring (Arm)
2026-06-05 1:00 ` [PATCH net-next v2 11/14] misc: tc956x_pci: add TC956x/QPS615 support Alex Elder
2026-06-05 1:00 ` [PATCH net-next v2 12/14] gpio: tc956x: " Alex Elder
2026-06-05 1:00 ` [PATCH net-next v2 13/14] net: stmmac: " Alex Elder
2026-06-05 1:00 ` [PATCH net-next v2 14/14] arm64: dts: qcom: qcs6490-rb3gen2: enable TC9564 with a single QCA8081 phy Alex Elder
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