Subject: Re: [PATCH RFC v3 0/5] ZTE zx297520v3 clock bindings and driver

From: Stefan Dösinger <[email-masked]>
Date: Wed, 03 Jun 2026 23:49:26 +0300

Hi Philipp,

Am Mittwoch, 3. Juni 2026, 11:50:14 Ostafrikanische Zeit schrieben Sie:
> When there is no interaction required when operating the clk/reset
> bits, I prefer the reset driver sitting in drivers/reset as an aux
> device, especially when register access can be abstracted via a shared
> regmap. Some of the reset drivers under drivers/clk just predate the
> aux bus.

There are two interactions:

The register lock because all LSP and at least one TOP register contains both 
clocks and resets.

Shared register definition: in the case of the LSP clocks breaking up the 
composite definition would sacrifice readability.

Neither of them are insurmountable and I can certainly arrange a separation if 
asked to - but my preference is to keep them together.