Subject: Re: [PATCH RFC] iommu: Enable per-device SSID space for SVA

From: Robin Murphy <[email-masked]>
Date: Mon, 11 May 2026 13:39:06 +0100

On 2026-05-09 6:10 pm, Jason Gunthorpe wrote:
> On Thu, May 07, 2026 at 09:58:51AM +0000, Joonwon Kang wrote:
> 
>> By "similar instruction" on ARM, I guess you mean ST64BV0, which fetches
>> the bottom 32 bits data from ACCDATA_EL1. Please let me know if you meant
>> others as it will matter. If ST64BV0 is supported on ARM, however, it
>> would mean that ST64B and ST64BV are also supported already according to
>> the ID_AA64ISAR1_EL1's LS64 field. The latter 2 instructions are just to
>> atomically store whatever user wants to a memory location without
>> referring to ACCDATA_EL1 and all the 3 instructions can be run at EL0. So,
>> the userspace driver would have enough capability to designate arbitrary
>> PASID as it wants via the latter 2 instructions when communicating with
>> multiple devices.
> 
> IDK exactly what ARM did. IIRC on Intel ENQCMD forms a special
> non-posted write TLP and the device can tell the TLP came from ENQCMD
> and so it trusts the encoded PASID. ARM has to have done the same
> thing - allowing anyone to forge the PASID by using a different
> instruction misses the point of the Intel design.

Yes, ACCDATA_EL1 is a privileged register neither writeable nor readable 
by userspace[1], so it should be functionally equivalent from an SVA 
point of view.

> Honestly, I'm not sure why they even implemented it. SMMUv3 can't do
> the translation scheme required to use ENQCMD from a VM anyhow, so it
> is pretty useless.

Not sure what you mean there - indeed you can't do the SIOV thing of 
assigning individual ADIs to _different_ VMs, but there's still no 
reason you couldn't give the whole accelerator device to one VM, and run 
the "full" kernel driver in that VM to hand out ADIs to processes, same 
as for non-virtualised ST64BV0/ENQCMD usage. It's entirely usable, just 
not so "scalable".

Thanks,
Robin.

[1] 
https://developer.arm.com/documentation/ddi0601/2026-03/AArch64-Registers/ACCDATA-EL1--Accelerator-Data

> 
>> We have multiple processes and a single device, those processes want to
>> do SVA with the same device, and only one process will do SVA with the
>> device at a time. Though, the problem occurs even when irrelevant
>> processes allocate the PASIDs from the global PASID space for their own
>> irrelevant purposes.
> 
> The only way to allocate a PASID from the global PASID space is to
> establish another SVA, so you have multiple devices doing SVA?
> 
> Jason