From: santosh.shilimkar@ti•com (Santosh Shilimkar)
To: linux-arm-kernel@lists•infradead.org
Subject: [RFC PATCH 13/17] ARM: mm: L2x0 save/restore support
Date: Thu, 07 Jul 2011 19:19:51 -0700 [thread overview]
Message-ID: <4E166947.1070308@ti.com> (raw)
In-Reply-To: <1310053830-23779-14-git-send-email-lorenzo.pieralisi@arm.com>
On 7/7/2011 8:50 AM, Lorenzo Pieralisi wrote:
> When the system hits deep low power states the L2 cache controller
> can lose its internal logic values and possibly its TAG/DATA RAM content.
>
> This patch adds save/restore hooks to the L2x0 subsystem to save/restore
> L2x0 registers and clean/invalidate/disable the cache controller as
> needed.
>
> The cache controller has to go to power down disabled even if its
> RAM(s) are retained to prevent it from sending AXI transactions on the
> bus when the cluster is shut-down which might leave the system in a
> limbo state.
>
> Hence the save function cleans (completely or partially) L2 and disable
> it in one single function to avoid playing with cacheable stack and
> flush data to L3.
>
> The current code saving context for retention mode is still a hack and must be
> improved.
>
> Fully tested on dual-core A9 cluster.
>
> Signed-off-by: Lorenzo Pieralisi<lorenzo.pieralisi@arm•com>
> ---
> arch/arm/include/asm/outercache.h | 22 +++++++++++++
> arch/arm/mm/cache-l2x0.c | 63 +++++++++++++++++++++++++++++++++++++
> 2 files changed, 85 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h
> index d838743..0437c21 100644
> --- a/arch/arm/include/asm/outercache.h
> +++ b/arch/arm/include/asm/outercache.h
> @@ -34,6 +34,8 @@ struct outer_cache_fns {
> void (*sync)(void);
> #endif
> void (*set_debug)(unsigned long);
> + void (*save_context)(void *, bool, unsigned long);
> + void (*restore_context)(void *, bool);
> };
>
> #ifdef CONFIG_OUTER_CACHE
> @@ -74,6 +76,19 @@ static inline void outer_disable(void)
> outer_cache.disable();
> }
>
> +static inline void outer_save_context(void *data, bool dormant,
> + phys_addr_t end)
> +{
> + if (outer_cache.save_context)
> + outer_cache.save_context(data, dormant, end);
> +}
> +
> +static inline void outer_restore_context(void *data, bool dormant)
> +{
> + if (outer_cache.restore_context)
> + outer_cache.restore_context(data, dormant);
> +}
> +
> #else
>
> static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
> @@ -86,6 +101,13 @@ static inline void outer_flush_all(void) { }
> static inline void outer_inv_all(void) { }
> static inline void outer_disable(void) { }
>
> +static inline void outer_save_context(void *data, bool dormant,
> + phys_addr_t end)
> +{ }
> +
> +static inline void outer_restore_context(void *data, bool dormant)
> +{ }
> +
> #endif
>
> #ifdef CONFIG_OUTER_CACHE_SYNC
> diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
> index ef59099..331fe9b 100644
> --- a/arch/arm/mm/cache-l2x0.c
> +++ b/arch/arm/mm/cache-l2x0.c
> @@ -270,6 +270,67 @@ static void l2x0_disable(void)
> spin_unlock_irqrestore(&l2x0_lock, flags);
> }
>
> +static void l2x0_save_context(void *data, bool dormant, unsigned long end)
> +{
> + u32 *l2x0_regs = (u32 *) data;
> + *l2x0_regs = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
> + l2x0_regs++;
> + *l2x0_regs = readl_relaxed(l2x0_base + L2X0_TAG_LATENCY_CTRL);
> + l2x0_regs++;
> + *l2x0_regs = readl_relaxed(l2x0_base + L2X0_DATA_LATENCY_CTRL);
> +
> + if (!dormant) {
> + /* clean entire L2 before disabling it*/
> + writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_WAY);
> + cache_wait_way(l2x0_base + L2X0_CLEAN_WAY, l2x0_way_mask);
> + } else {
> + /*
> + * This is an ugly hack, which is there to clean
> + * the stack from L2 before disabling it
> + * The only alternative consists in using a non-cacheable stack
> + * but it is poor in terms of performance since it is only
> + * needed for cluster shutdown and L2 retention
> + * On L2 off mode the cache is cleaned anyway
> + */
> + register unsigned long start asm("sp");
> + start&= ~(CACHE_LINE_SIZE - 1);
> + while (start< end) {
> + cache_wait(l2x0_base + L2X0_CLEAN_LINE_PA, 1);
> + writel_relaxed(__pa(start), l2x0_base +
> + L2X0_CLEAN_LINE_PA);
> + start += CACHE_LINE_SIZE;
> + }
> + }
I think you need a cache_sync() here.
> + /*
> + * disable the cache implicitly syncs
> + */
> + writel_relaxed(0, l2x0_base + L2X0_CTRL);
> +}
> +
> +static void l2x0_restore_context(void *data, bool dormant)
> +{
> + u32 *l2x0_regs = (u32 *) data;
> +
> + if (!(readl_relaxed(l2x0_base + L2X0_CTRL)& 1)) {
> +
> + writel_relaxed(*l2x0_regs, l2x0_base + L2X0_AUX_CTRL);
> + l2x0_regs++;
> + writel_relaxed(*l2x0_regs, l2x0_base + L2X0_TAG_LATENCY_CTRL);
> + l2x0_regs++;
> + writel_relaxed(*l2x0_regs, l2x0_base + L2X0_DATA_LATENCY_CTRL);
> + /*
> + * If L2 is retained do not invalidate
> + */
> + if (!dormant) {
> + writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
> + cache_wait_way(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
> + cache_sync();
> + }
> +
> + writel_relaxed(1, l2x0_base + L2X0_CTRL);
Sorry for giving comments on OMAP needs. None of the above registers
are accessible from non-secure SW. They need a secure API to set them.
This one too like GIC looks not useful in it's current form. :(
Regards
Santosh
next prev parent reply other threads:[~2011-07-08 2:19 UTC|newest]
Thread overview: 90+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-07 15:50 [RFC PATCH 00/17] ARM: common idle infrastructure Lorenzo Pieralisi
2011-07-07 15:50 ` [PATCH 01/17] ARM: proc: add definition of cpu_reset for ARMv6 and ARMv7 cores Lorenzo Pieralisi
2011-07-08 1:12 ` Santosh Shilimkar
2011-07-08 8:22 ` Will Deacon
2011-07-09 10:14 ` Russell King - ARM Linux
2011-07-10 11:00 ` Will Deacon
2011-07-10 11:52 ` Russell King - ARM Linux
2011-07-10 13:21 ` Will Deacon
2011-07-07 15:50 ` [PATCH 02/17] ARM: Add cpu power management notifiers Lorenzo Pieralisi
2011-07-08 1:14 ` Santosh Shilimkar
2011-07-09 10:15 ` Russell King - ARM Linux
2011-07-09 21:32 ` Colin Cross
2011-07-07 15:50 ` [PATCH 03/17] ARM: gic: Use cpu pm notifiers to save gic state Lorenzo Pieralisi
2011-07-08 1:35 ` Santosh Shilimkar
2011-07-08 1:41 ` Colin Cross
2011-07-08 2:07 ` Santosh Shilimkar
2011-07-08 7:08 ` Kukjin Kim
2011-07-09 10:21 ` Russell King - ARM Linux
2011-07-09 22:10 ` Colin Cross
2011-07-09 22:33 ` Russell King - ARM Linux
2011-07-09 23:01 ` Colin Cross
2011-07-09 23:05 ` Russell King - ARM Linux
2011-07-09 23:24 ` Colin Cross
2011-07-10 0:10 ` Santosh Shilimkar
2011-07-21 8:32 ` Santosh Shilimkar
2011-07-21 10:27 ` Lorenzo Pieralisi
2011-07-21 10:46 ` Santosh Shilimkar
2011-07-21 19:06 ` Colin Cross
2011-07-22 5:10 ` Santosh Shilimkar
2011-07-22 5:21 ` Colin Cross
2011-08-17 16:15 ` Santosh
2011-07-07 15:50 ` [PATCH 04/17] ARM: vfp: Use cpu pm notifiers to save vfp state Lorenzo Pieralisi
2011-07-09 10:44 ` Russell King - ARM Linux
2011-07-09 14:32 ` Russell King - ARM Linux
2011-07-07 15:50 ` [RFC PATCH 05/17] ARM: kernel: save/restore kernel IF Lorenzo Pieralisi
2011-07-08 1:45 ` Santosh Shilimkar
2011-07-08 8:39 ` Lorenzo Pieralisi
2011-07-08 16:12 ` Frank Hofmann
2011-07-11 14:00 ` Lorenzo Pieralisi
2011-07-11 14:31 ` Frank Hofmann
2011-07-11 16:02 ` Lorenzo Pieralisi
2011-07-11 16:57 ` Frank Hofmann
2011-07-11 18:05 ` Lorenzo Pieralisi
2011-07-11 18:40 ` Russell King - ARM Linux
2011-07-11 18:51 ` Colin Cross
2011-07-11 19:19 ` Russell King - ARM Linux
2011-07-11 19:38 ` Colin Cross
2011-07-11 20:09 ` Santosh Shilimkar
2011-07-11 20:05 ` Santosh Shilimkar
2011-07-11 20:14 ` Russell King - ARM Linux
2011-07-11 21:31 ` Santosh Shilimkar
2011-07-12 10:12 ` Lorenzo Pieralisi
2011-07-12 10:19 ` Russell King - ARM Linux
2011-07-09 8:38 ` Russell King - ARM Linux
2011-07-09 8:45 ` Russell King - ARM Linux
2011-07-11 15:36 ` Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 06/17] ARM: kernel: save/restore generic infrastructure Lorenzo Pieralisi
2011-07-08 1:58 ` Santosh Shilimkar
2011-07-08 10:33 ` Lorenzo Pieralisi
2011-07-09 10:01 ` Russell King - ARM Linux
2011-07-11 11:33 ` Lorenzo Pieralisi
2011-07-28 16:22 ` Amit Kachhap
2011-07-28 18:17 ` Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 07/17] ARM: kernel: save/restore v7 assembly helpers Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 08/17] ARM: kernel: save/restore arch runtime support Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 09/17] ARM: kernel: v7 resets support Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 10/17] ARM: kernel: save/restore v7 infrastructure support Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 11/17] ARM: kernel: add support for Lamport's bakery locks Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 12/17] ARM: kernel: add SCU reset hook Lorenzo Pieralisi
2011-07-08 2:14 ` Santosh Shilimkar
2011-07-08 9:47 ` Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 13/17] ARM: mm: L2x0 save/restore support Lorenzo Pieralisi
2011-07-07 22:06 ` Colin Cross
2011-07-08 8:25 ` Lorenzo Pieralisi
2011-07-08 2:19 ` Santosh Shilimkar [this message]
2011-07-08 10:54 ` Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 14/17] ARM: kernel: save/restore 1:1 page tables Lorenzo Pieralisi
2011-07-08 2:24 ` Santosh Shilimkar
2011-07-08 10:48 ` Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 15/17] ARM: perf: use cpu pm notifiers to save pmu state Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 16/17] ARM: PM: enhance idle pm notifiers Lorenzo Pieralisi
2011-07-07 21:20 ` Colin Cross
2011-07-08 9:04 ` Lorenzo Pieralisi
2011-07-07 15:50 ` [RFC PATCH 17/17] ARM: kernel: save/restore build infrastructure Lorenzo Pieralisi
2011-07-08 2:29 ` Santosh Shilimkar
2011-07-08 15:14 ` Lorenzo Pieralisi
2011-07-26 12:14 ` Amit Kachhap
2011-07-27 8:48 ` Lorenzo Pieralisi
2011-07-07 17:15 ` [RFC PATCH 00/17] ARM: common idle infrastructure Russell King - ARM Linux
2011-07-08 7:56 ` Lorenzo Pieralisi
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