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From: jon-hunter@ti•com (Jon Hunter)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 2/5] ARM: OMAP2+: PM: use the power domains registers cache for the power states
Date: Tue, 1 May 2012 10:37:39 -0500	[thread overview]
Message-ID: <4FA00343.3020704@ti.com> (raw)
In-Reply-To: <1335877663-32649-3-git-send-email-j-pihet@ti.com>

Hi Jean,

On 05/01/2012 08:07 AM, jean.pihet at newoldbits.com wrote:
> From: Jean Pihet <j-pihet@ti•com>
> 
> Use the caching API for the previous, current and next power domains states.
> 
> Signed-off-by: Jean Pihet <j-pihet@ti•com>
> ---
>  arch/arm/mach-omap2/powerdomain.c |   32 ++++++++++++++++++++++++++------
>  1 files changed, 26 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
> index 18e1ffc..2058e27 100644
> --- a/arch/arm/mach-omap2/powerdomain.c
> +++ b/arch/arm/mach-omap2/powerdomain.c
> @@ -854,6 +854,8 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
>  					  smp_processor_id());
>  		/* Program the pwrdm desired target state */
>  		ret = arch_pwrdm->pwrdm_set_next_pwrst(pwrdm, pwrst);
> +		if (!ret)
> +			pwrdm_cache_write(pwrdm, PWRDM_CACHE_NEXT_PWRST, pwrst);
>  	}
>  
>  	return ret;
> @@ -869,13 +871,19 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
>   */
>  int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
>  {
> -	int ret = -EINVAL;
> +	int pwrst, ret = -EINVAL;
>  
>  	if (!pwrdm)
>  		return -EINVAL;
>  
> -	if (arch_pwrdm && arch_pwrdm->pwrdm_read_next_pwrst)
> +	if (!pwrdm_cache_read(pwrdm, PWRDM_CACHE_NEXT_PWRST, &pwrst))
> +		return pwrst;
> +
> +	if (arch_pwrdm && arch_pwrdm->pwrdm_read_next_pwrst) {
>  		ret = arch_pwrdm->pwrdm_read_next_pwrst(pwrdm);
> +		if (ret >= 0)
> +			pwrdm_cache_write(pwrdm, PWRDM_CACHE_NEXT_PWRST, ret);
> +	}
>  
>  	return ret;
>  }
> @@ -906,13 +914,19 @@ int pwrdm_read_next_func_pwrst(struct powerdomain *pwrdm)
>   */
>  int pwrdm_read_pwrst(struct powerdomain *pwrdm)
>  {
> -	int ret = -EINVAL;
> +	int pwrst, ret = -EINVAL;
>  
>  	if (!pwrdm)
>  		return -EINVAL;
>  
> -	if (arch_pwrdm && arch_pwrdm->pwrdm_read_pwrst)
> +	if (!pwrdm_cache_read(pwrdm, PWRDM_CACHE_PWRST, &pwrst))
> +		return pwrst;
> +
> +	if (arch_pwrdm && arch_pwrdm->pwrdm_read_pwrst) {
>  		ret = arch_pwrdm->pwrdm_read_pwrst(pwrdm);
> +		if (ret >= 0)
> +			pwrdm_cache_write(pwrdm, PWRDM_CACHE_PWRST, ret);
> +	}

Do we really want to use the cache for the current state? This is
updated by hardware. In the above it appears that once we have read it
once we will just return this value until the cache is invalidated.
Makes me a little nervous.

Cheers
Jon

  reply	other threads:[~2012-05-01 15:37 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-05-01 13:07 [PATCH 0/5] ARM: OMAP2+: PM: implement a caching mechanism on the power domains state registers jean.pihet at newoldbits.com
2012-05-01 13:07 ` [PATCH 1/5] " jean.pihet at newoldbits.com
2012-05-01 13:07 ` [PATCH 2/5] ARM: OMAP2+: PM: use the power domains registers cache for the power states jean.pihet at newoldbits.com
2012-05-01 15:37   ` Jon Hunter [this message]
2012-05-03  6:38     ` Bedia, Vaibhav
2012-05-03  7:28       ` Jean Pihet
2012-05-01 13:07 ` [PATCH 3/5] ARM: OMAP2+: PM: use the power domains registers cache for the logic and mem states jean.pihet at newoldbits.com
2012-05-01 15:37   ` Jon Hunter
2012-05-01 13:07 ` [PATCH 4/5] ARM: OMAP2+: PM: use the power domains registers cache invalidate API jean.pihet at newoldbits.com
2012-05-01 13:07 ` [PATCH 5/5] ARM: OMAP2+: PM debug: use the power domains registers caching API jean.pihet at newoldbits.com
2012-05-01 15:37 ` [PATCH 0/5] ARM: OMAP2+: PM: implement a caching mechanism on the power domains state registers Jon Hunter

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