From: swarren@wwwdotorg•org (Stephen Warren)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v2 07/10] ARM: tegra: pcie: Add device tree support
Date: Tue, 19 Jun 2012 10:40:39 -0600 [thread overview]
Message-ID: <4FE0AB87.9030007@wwwdotorg.org> (raw)
In-Reply-To: <20120619133001.GB24138@avionic-0098.mockup.avionic-design.de>
On 06/19/2012 07:30 AM, Thierry Reding wrote:
> On Fri, Jun 15, 2012 at 08:12:36AM +0200, Thierry Reding wrote:
>> On Thu, Jun 14, 2012 at 01:50:56PM -0600, Stephen Warren wrote:
...
>>> To me, working back from address to ID then using the ID to calculate
>>> some other addresses seems far more icky than just calculating all the
>>> addresses based off of one ID. But, I suppose this doesn't make a huge
>>> practical difference.
>>
>> This really depends on the device vs. no device decision below. If we can
>> make it work without needing an extra device for it, then using the index
>> is certainly better. However, if we instantiate devices from the DT, then
>> we have the address anyway and adding the index as a property would be
>> redundant and error prone (what happens if somebody sets the index of the
>> port at address 0x80000000 to 2?).
>
> An additional problem with this is that we'd have to add the following
> to the pcie-controller node:
>
> #address-cells = <1>;
> #size-cells = <0>;
>
> This will conflict with the "ranges" property, because suddenly we can
> no longer map the regions properly. Maybe Mitch can comment on whether
> this is possible or not?
>
> To make it clearer what I'm talking about, here's the DT snippet again
> (with the compatible property removed from the pci@ nodes because they
> are no longer probed by a driver, the "simple-bus" removed from the
> pcie-controller node's compatible property removed and its #address-
> and #size-cells properties adjusted as described above).
>
> pcie-controller {
> compatible = "nvidia,tegra20-pcie";
> reg = <0x80003000 0x00000800 /* PADS registers */
> 0x80003800 0x00000200 /* AFI registers */
> 0x80004000 0x00100000 /* configuration space */
> 0x80104000 0x00100000>; /* extended configuration space */
> interrupts = <0 98 0x04 /* controller interrupt */
> 0 99 0x04>; /* MSI interrupt */
> status = "disabled";
>
> ranges = <0x80000000 0x80000000 0x00002000 /* 2 root ports */
> 0x80400000 0x80400000 0x00010000 /* downstream I/O */
> 0x90000000 0x90000000 0x10000000 /* non-prefetchable memory */
> 0xa0000000 0xa0000000 0x10000000>; /* prefetchable memory */
>
> #address-cells = <1>;
> #size-cells = <0>;
>
> pci at 0 {
> reg = <2>;
> status = "disabled";
>
> #address-cells = <3>;
> #size-cells = <2>;
>
> ranges = <0x81000000 0 0 0x80400000 0 0x00008000 /* I/O */
> 0x82000000 0 0 0x90000000 0 0x08000000 /* non-prefetchable memory */
> 0xc2000000 0 0 0xa0000000 0 0x08000000>; /* prefetchable memory */
>
> nvidia,ctrl-offset = <0x110>;
> nvidia,num-lanes = <2>;
> };
>
> pci at 1 {
> reg = <1>;
> status = "disabled";
>
> #address-cells = <3>;
> #size-cells = <2>;
>
> ranges = <0x81000000 0 0 0x80408000 0 0x00008000 /* I/O */
> 0x82000000 0 0 0x98000000 0 0x08000000 /* non-prefetchable memory */
> 0xc2000000 0 0 0xa8000000 0 0x08000000>; /* prefetchable memory */
>
> nvidia,ctrl-offset = <0x118>;
> nvidia,num-lanes = <2>;
> };
> };
>
> AIUI none of the ranges properties are valid anymore, because the bus
> represented by pcie-controller no longer reflects the truth, namely that
> it translates the CPU address space to the PCI address space.
Yes, I imagine that's a show-stopper for this approach.
next prev parent reply other threads:[~2012-06-19 16:40 UTC|newest]
Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-11 15:05 [PATCH v2 00/10] ARM: tegra: Add PCIe device tree support Thierry Reding
2012-06-11 15:05 ` [PATCH v2 01/10] PCI: Keep pci_fixup_irqs() around after init Thierry Reding
2012-06-11 15:05 ` [PATCH v2 02/10] ARM: pci: Keep pci_common_init() " Thierry Reding
2012-06-11 15:05 ` [PATCH v2 03/10] ARM: pci: Allow passing per-controller private data Thierry Reding
2012-06-11 15:05 ` [PATCH v2 04/10] ARM: tegra: Move tegra_pcie_xclk_clamp() to PMC Thierry Reding
2012-06-11 15:05 ` [PATCH v2 05/10] ARM: tegra: Rewrite PCIe support as a driver Thierry Reding
2012-06-11 21:09 ` Stephen Warren
2012-06-12 6:41 ` Thierry Reding
2012-06-12 7:24 ` Thierry Reding
2012-06-12 16:00 ` Stephen Warren
2012-06-13 8:12 ` Thierry Reding
2012-06-11 21:22 ` Stephen Warren
2012-06-12 4:59 ` Thierry Reding
2012-06-11 15:05 ` [PATCH v2 06/10] ARM: tegra: pcie: Add MSI support Thierry Reding
2012-06-11 21:19 ` Stephen Warren
2012-06-12 5:07 ` Thierry Reding
2012-06-12 5:33 ` Stephen Warren
2012-06-12 5:41 ` Thierry Reding
2012-06-12 6:10 ` Thierry Reding
2012-06-12 15:40 ` Stephen Warren
2012-06-12 17:23 ` Thierry Reding
2012-06-11 15:05 ` [PATCH v2 07/10] ARM: tegra: pcie: Add device tree support Thierry Reding
2012-06-11 21:33 ` Stephen Warren
2012-06-12 6:21 ` Thierry Reding
2012-06-12 15:44 ` Stephen Warren
2012-06-12 17:20 ` Thierry Reding
2012-06-12 19:10 ` Mitch Bradley
2012-06-12 19:46 ` Stephen Warren
2012-06-12 19:52 ` Mitch Bradley
2012-06-13 5:54 ` Thierry Reding
2012-06-13 7:04 ` Mitch Bradley
2012-06-12 20:15 ` Stephen Warren
2012-06-12 21:11 ` Mitch Bradley
2012-06-13 6:45 ` Thierry Reding
2012-06-13 7:28 ` Mitch Bradley
2012-06-13 7:52 ` Thierry Reding
2012-06-13 8:05 ` Mitch Bradley
2012-06-13 8:19 ` Thierry Reding
2012-06-13 8:36 ` Mitch Bradley
2012-06-13 8:42 ` Thierry Reding
2012-06-14 9:19 ` Thierry Reding
2012-06-14 18:30 ` Stephen Warren
2012-06-14 19:29 ` Thierry Reding
2012-06-14 19:50 ` Stephen Warren
2012-06-15 6:12 ` Thierry Reding
2012-06-19 13:30 ` Thierry Reding
2012-06-19 16:40 ` Stephen Warren [this message]
2012-06-19 21:31 ` Mitch Bradley
2012-06-20 16:32 ` Stephen Warren
2012-06-20 17:41 ` Mitch Bradley
2012-06-20 17:47 ` Stephen Warren
2012-06-20 19:57 ` Arnd Bergmann
2012-06-20 20:19 ` Mitch Bradley
2012-06-21 6:47 ` Thierry Reding
2012-06-22 10:18 ` Bjorn Helgaas
2012-06-22 11:00 ` Thierry Reding
2012-06-22 11:46 ` Bjorn Helgaas
2012-06-22 12:43 ` Thierry Reding
2012-06-22 13:03 ` Arnd Bergmann
2012-06-22 16:49 ` Bjorn Helgaas
2012-06-22 16:53 ` Arnd Bergmann
2012-06-22 17:13 ` Bjorn Helgaas
2012-06-22 21:08 ` Arnd Bergmann
2012-06-22 17:14 ` Arnd Bergmann
2012-06-22 17:00 ` Stephen Warren
2012-06-22 17:28 ` Stephen Warren
2012-06-23 21:35 ` Bjorn Helgaas
2012-06-25 6:34 ` Thierry Reding
2012-06-26 17:22 ` Stephen Warren
2012-06-27 6:19 ` Thierry Reding
2012-06-22 16:20 ` Stephen Warren
2012-06-22 17:09 ` Mitch Bradley
2012-06-22 11:04 ` Thierry Reding
2012-06-22 13:22 ` Thierry Reding
2012-06-22 13:48 ` Arnd Bergmann
2012-06-22 14:02 ` Thierry Reding
2012-06-22 16:40 ` Arnd Bergmann
2012-06-13 20:21 ` Arnd Bergmann
2012-06-14 8:37 ` Thierry Reding
2012-06-14 10:25 ` Arnd Bergmann
2012-06-14 10:31 ` Thierry Reding
2012-06-14 11:06 ` Arnd Bergmann
2012-06-14 11:58 ` Thierry Reding
2012-06-13 6:34 ` Thierry Reding
2012-06-13 16:20 ` Stephen Warren
2012-06-13 17:03 ` Stephen Warren
2012-06-11 15:05 ` [PATCH v2 08/10] ARM: tegra: harmony: Initialize regulators from DT Thierry Reding
2012-06-11 21:36 ` Stephen Warren
2012-06-12 6:13 ` Thierry Reding
2012-06-21 20:17 ` Stephen Warren
2012-06-22 6:06 ` Thierry Reding
2012-06-11 15:05 ` [PATCH v2 09/10] ARM: tegra: harmony: Initialize PCIe " Thierry Reding
2012-06-11 21:41 ` Stephen Warren
2012-06-12 5:48 ` Thierry Reding
2012-06-12 15:38 ` Stephen Warren
2012-06-11 15:05 ` [PATCH v2 10/10] ARM: tegra: trimslice: " Thierry Reding
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