Subject: [PATCH] ARM: dts: imx6q-sabrelite: add ecspi1 pinctrl support

From: [email-masked] (Hui Wang)
Date: Wed, 20 Jun 2012 14:28:00 +0800

Shawn Guo wrote:
> On Tue, Jun 19, 2012 at 05:08:07PM +0800, Hui Wang wrote:
>   
>> Imx6q sabrelite board uses ecspi1 to connect a spi flash sst25vf016b,
>> we need to add pinctrl information for it in the dts, otherwise the
>> ecspi1 driver can't work and the connected flash is wrongly
>> detected as a mr25h256 flash like this:
>>
>> m25p80 spi32766.0: found mr25h256, expected sst25vf016b
>> m25p80 spi32766.0: mr25h256 (32 Kbytes)
>>
>> Cc: Richard Zhao <[email-masked]>
>> Cc: Shawn Guo <[email-masked]>
>> Signed-off-by: Hui Wang <[email-masked]>
>> ---
>>  arch/arm/boot/dts/imx6q-sabrelite.dts | 2 ++
>>  arch/arm/boot/dts/imx6q.dtsi          | 9 +++++++++
>>  2 files changed, 11 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
>> index e0ec929..83a8f62 100644
>> --- a/arch/arm/boot/dts/imx6q-sabrelite.dts
>> +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
>> @@ -27,6 +27,8 @@
>>  				ecspi at 02008000 { /* eCSPI1 */
>>  					fsl,spi-num-chipselects = <1>;
>>  					cs-gpios = <&gpio3 19 0>;
>> +					pinctrl-names = "default";
>> +					pinctrl-0 = <&pinctrl_ecspi1_1>;
>>  					status = "okay";
>>  
>>  					flash: m25p80 at 0 {
>> diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
>> index 8c90cba..ae8e7f2 100644
>> --- a/arch/arm/boot/dts/imx6q.dtsi
>> +++ b/arch/arm/boot/dts/imx6q.dtsi
>> @@ -538,6 +538,15 @@
>>  							    1517 0x17059>;	/* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */
>>  					};
>>  				};
>> +
>> +				ecspi1 {
>> +					pinctrl_ecspi1_1: ecspi1grp-1 {
>> +						fsl,pins = <101 0x100b1		/* MX6Q_PAD_EIM_D17__ECSPI1_MISO */
>> +							    109 0x100b1		/* MX6Q_PAD_EIM_D18__ECSPI1_MOSI */
>> +							    94  0x100b1		/* MX6Q_PAD_EIM_D16__ECSPI1_SCLK */
>> +							    121 0x100b1>;	/* MX6Q_PAD_EIM_D19__GPIO_3_19 */
>>     
>
> Which gpio is used is really a board specific setting and should not
> be defined in <soc>.dtsi.  Before gpio_request can automatically
> configure the requested pin into gpio mode by talking to pinctrl system,
> we may want to use "hog" feature to configure pins into gpio mode,
> which means defining a pinctrl state for pin controller node itself,
> then at pinctrl subsystem init time, pinctrl core will configure these
> "hog" pins properly.  The following is an example using that feature.
>
> http://permalink.gmane.org/gmane.linux.usb.general/65761
>
> Regards,
> Shawn
>
>   
Yes, you are right, i will fix it in the v2.

Thanks,
Hui.
>> +					};
>> +				};
>>  			};
>>  
>>  			dcic at 020e4000 { /* DCIC1 */
>> -- 
>> 1.7.11
>>
>>     
>
>
>