Subject: Re: [PATCH 0/8] ras: aest: extend AEST support to Device Tree frontend

From: Ruidong Tian <[email-masked]>
Date: Tue, 2 Jun 2026 15:29:22 +0800

Hi Umang,

I have sent out v7, and I wanted to highlight a few changes to make it 
easier for you to adapt the devicetree support:

1. I stopped passing device information to the driver through the 
acpi_aest_node structure. Instead, I switched to using the device 
property infrastructure and removed the aest_device abstraction layer 
(which was originally introduced to support CMN). This should provide 
good compatibility between ACPI and devicetree and avoid the need to 
write extra adaptation code for devicetree (such as aest_of). In the 
ideal case, adding just one of_match_id should be enough to make it 
work, although this will require you to update the DTB file accordingly.

2. I removed the use of genpool. The current AEST driver only needs 
memory in interrupt context, so genpool is not needed.

3.The driver has been renamed to arm64_ras.

I have already applied some of your previous fix patches and added your 
Signed-off-by.

Best regards,
Ruidong

在 2026/5/5 20:23, Umang Chheda 写道:
> This series extends Tian Ruidong’s [1] ACPI-based AEST support series
> to also cover Device Tree based platforms.
> 
> While the existing AEST driver relies on the AEST ACPI table [3], many
> embedded Arm platforms use Device Tree exclusively and cannot use the
> driver today. This series adds a DT frontend that mirrors the ACPI
> implementation and feeds the same core driver, keeping ACPI and DT
> paths functionally equivalent.
> 
> Along the way, several correctness issues were identified in the core
> driver and are fixed in the first part of this series.
> 
> The DT frontend is mutually exclusive with ACPI and does not introduce
> any DT-specific logic into the core.
> 
> How to test with QEMU
> --------------------------
> Tian Ruidong's QEMU fork [2] emulates AEST MMIO error records on the
> virt machine.  To test the DT frontend:
> 
> 1. Build QEMU:
> 
>       git clone https://github.com/winterddd/qemu.git
>       cd qemu
>       git checkout c5e2d5dec9fd62ba622314c40bff0fbecb4dfb34
>       ./configure --target-list=aarch64-softmmu
>       make -j$(nproc)
> 
> 2. Build the kernel with:
> 
>       CONFIG_OF_AEST=y
>       CONFIG_AEST=y
>       CONFIG_ARM64_RAS_EXTN=y
>       CONFIG_RAS=y
> 
> 3. Add the following DT node to your virt machine DTB.  The QEMU
>     fork maps DRAM error records at 0x090d0000 (SPI 44) and CMN
>     vendor records at 0x090e0000 (SPI 45):
> 
>       aest {
>           compatible = "arm,aest";
>           #address-cells = <2>;
>           #size-cells = <2>;
>           ranges;
>           interrupt-parent = <&gic>;
> 
>           /* DRAM memory node — MMIO at 0x090d0000, SPI 44 */
>           aest-dram0@90d0000 {
>               compatible               = "arm,aest-memory";
>               arm,interface-type       = <1>;
>               arm,group-format         = <0>;
>               arm,interface-flags      = <0x22>;
>               arm,num-records          = <4>;
>               arm,record-impl          = /bits/ 64 <0x0>;
>               arm,status-report        = /bits/ 64 <0x0>;
>               arm,addr-mode            = /bits/ 64 <0x0>;
>               arm,proximity-domain     = <0>;
>               reg                      = <0x0 0x090d0000 0x0 0x1000>,
>                                          <0x0 0x090d0800 0x0 0x200>,
>                                          <0x0 0x090d0e00 0x0 0x100>;
>               reg-names                = "errblock", "fault-inject",
>                                          "err-group";
>               interrupts               = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
>               interrupt-names          = "fhi";
>           };
> 	};
> 
> 4. Boot QEMU with acpi=off:
> 
>       ./qemu-system-aarch64 \
>         -machine virt,accel=tcg,gic-version=3 \
>         -cpu cortex-a57 -m 2G -smp 4 \
>         -kernel Image -dtb virt-aest.dtb \
>         -append "console=ttyAMA0 acpi=off earlycon" \
>         -nographic
> 
> 5. Verify probe:
> 
>       dmesg | grep "DT AEST"
>       # Expected: DT AEST: registered 1 AEST error source(s) from DT
>       ls /sys/kernel/debug/aest/
> 
> 6. Inject a CE error via the QEMU MMIO fault injection registers.
>     The QEMU device accepts 64-bit accesses only (use devmem with
>     the 64-bit width flag):
> 
>       devmem 0x090d0808 64 0x80000040   # CDOFF | CE inject
> 
>     This triggers QEMU's error_record_inj_write() which sets
>     ERR<n>STATUS.V=1 and asserts the IRQ.  The kernel driver's
>     aest_irq_func() fires, reads the status, and logs:
> 
>       AEST: {1}[Hardware Error]: Hardware error from AEST memory.90d0000
>       AEST: {1}[Hardware Error]: Error from memory at SRAT proximity domain 0x0
> 
> Testing
> -------
> - Validated on Qualcomm's lemans-evk and monaco-evk board with DT boot.
> - Validated CE and UE injection via debugfs soft_inject.
> - Tested ACPI path is unaffected: ACPI boot continues to use
>    drivers/acpi/arm64/aest.c unchanged.
> 
> [1] https://lore.kernel.org/lkml/[email-masked]/
> [2] https://github.com/winterddd/qemu/tree/error_record
> [3] https://developer.arm.com/documentation/den0085/0200/
> 
> Signed-off-by: Umang Chheda <[email-masked]>
> ---
> Umang Chheda (8):
>        ras: aest: Fix shared processor node handling and error log messages
>        ras: aest: Fix CE/UE error counts not incrementing in debugfs
>        ras: aest: Skip unimplemented records in debugfs
>        ras: aest: Add panic_on_ue module parameter
>        dt-bindings: arm: ras: Introduce bindings for ARM AEST
>        ras: aest: Add DT frontend for ARM AEST RAS error sources
>        arm64: dts: qcom: lemans: add AEST error nodes
>        arm64: dts: qcom: monaco: add AEST error nodes
> 
>   .../devicetree/bindings/arm/arm,aest.yaml          | 406 +++++++++++++
>   arch/arm64/boot/dts/qcom/lemans.dtsi               |  41 ++
>   arch/arm64/boot/dts/qcom/monaco.dtsi               |  41 ++
>   drivers/ras/aest/Kconfig                           |  15 +-
>   drivers/ras/aest/Makefile                          |   2 +
>   drivers/ras/aest/aest-core.c                       |  63 +-
>   drivers/ras/aest/aest-of.c                         | 673 +++++++++++++++++++++
>   drivers/ras/aest/aest-sysfs.c                      |  27 +-
>   drivers/ras/aest/aest.h                            |  15 +-
>   include/dt-bindings/arm/aest.h                     |  43 ++
>   10 files changed, 1310 insertions(+), 16 deletions(-)
> ---
> base-commit: a67b7fd0dd1f6ccf3d128dc2099cdb07af1f6a09
> change-id: 20260505-aest-devicetree-support-a3722d90e1f5
> prerequisite-message-id: <[email-masked]>
> prerequisite-patch-id: c5a7c6431c6c1e6351241e694ee053800039d41d
> prerequisite-patch-id: 1f6e2c20829eee41a210dd8a538f1e8efcc65872
> prerequisite-patch-id: 5556287e3f46c2ed2c0431c53c7782e87bcbd866
> prerequisite-patch-id: 2edae0a136d7779b8f686181720e71d044a73311
> prerequisite-patch-id: b5190b2844dcb01e72f87a59f3a29548795fdb82
> prerequisite-patch-id: 7ba848583708b2ae776a7ce847bb056e3de7f77b
> prerequisite-patch-id: 397e5b22802b67942435f4f2968f0b1e210ba0e8
> prerequisite-patch-id: 2169f4b65537eecbd0ccbd2ad6b28c64ec44655d
> prerequisite-patch-id: b626f85d98747595b3240bc49e6ad9c9dd5c0fa9
> prerequisite-patch-id: 1323dfd2eebad2ef6514dbbce58ba08e8859f894
> prerequisite-patch-id: 95b826e5e329408437a3ef336c4f45d4d74f82bb
> prerequisite-patch-id: b60ff489a5a33c5d5220fa8144af7b7511769cba
> prerequisite-patch-id: 43f35a52b8a3d13c938ff08083403c1d3bd0df8b
> prerequisite-patch-id: c55d4e9117ca36d3c2cba82d550a618cb82bb745
> prerequisite-patch-id: 3885e10f318ae8101d6909b35d92a976cc359e3c
> prerequisite-patch-id: 92958cde05577f069c5659018a274bb39cfb6b24
> 
> Best regards,
> --
> Umang Chheda <[email-masked]>
>