Subject: [RFC 2/4] ARM: OMAP: PM: Get rid of Powerdomain book-keeping from cpuidle

From: [email-masked] (Rajendra Nayak)
Date: Fri, 20 Jul 2012 13:38:42 +0530

On Friday 20 July 2012 12:55 PM, Shilimkar, Santosh wrote:
> On Fri, Jul 20, 2012 at 11:34 AM, Rajendra Nayak<[email-masked]>  wrote:
>> pwrdm_pre_transition()/pwrdm_post_transition() have always been high latency
>> operations done within cpuidle to do Powerdomain level book-keeping to know
>> what state transitions for different Powerdomains have been triggered.
>> This is also useful to do a restore-on-demand in some cases when we know
>> the context for the given Powerdomain was lost etc.
>>
>> Now that we have definitive entry/exit points (thanks to the Powerdomain
>> level usecounting) for Powerdomain transitions, these book-keeping functions
>> can very well be moved from within CPUidle into pwrdm_clkdm_enable()/pwrdm_
>> clkdm_disable() functions.
>>
>> Also rename _pwrdm_pre/post_transition_cb() to pwrdm_pre/post_transition()
>> and get rid of the original ones which iterate over all powerdomains.
>>
>> Signed-off-by: Rajendra Nayak<[email-masked]>
>> ---
>>   arch/arm/mach-omap2/omap-mpuss-lowpower.c |    4 ++--
>>   arch/arm/mach-omap2/pm34xx.c              |    4 ++--
>>   arch/arm/mach-omap2/powerdomain.c         |   28 ++++++++--------------------
>>   arch/arm/mach-omap2/powerdomain.h         |    4 ++--
>>   4 files changed, 14 insertions(+), 26 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
>> index 13670aa..ea19439 100644
>> --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
>> +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
>> @@ -255,7 +255,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
>>                  return -ENXIO;
>>          }
>>
>> -       pwrdm_pre_transition();
>> +       pwrdm_cpu_idle();
>>
> Glad to see this is getting optimized.
> I haven't seen how "pwrdm_cpu_[idle/wakeup]()" is
> implemented but will those work on SMP system ?
> I mean OMAP4, any CPU can make this call ?

Thats a good question. I think Tero did this so he can kick in
voltage transitions at the right time in idle/suspend.
Given that these deal with incrementing/decrementing the MPU and CORE
pwrdm usecounts alone, maybe on OMAP4 (SMP systems) this needs to also
increment/decrement the specific CPU usecounts on the CPUs these calls
are made.

> Regards
> Santosh