From: swarren@wwwdotorg•org (Stephen Warren)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 2/7] ARM: tegra: cpuidle: add LP2 resume function
Date: Tue, 09 Oct 2012 16:29:45 -0600 [thread overview]
Message-ID: <5074A559.8030206@wwwdotorg.org> (raw)
In-Reply-To: <1349691981-31038-3-git-send-email-josephl@nvidia.com>
On 10/08/2012 04:26 AM, Joseph Lo wrote:
> LP2 is one of the Tegra low power states that supports power gating both
> CPU cores and GICs. Adding a resume function for taking care the CPUs that
> resume from LP2. This function was been hooked to reset handler. We take
> care everything here before go into kernel.
> diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S
> +ENTRY(tegra_resume)
...
> + /* Are we on Tegra20? */
> + mov32 r6, TEGRA_APB_MISC_BASE
> + ldr r0, [r6, #APB_MISC_GP_HIDREV]
> + and r0, r0, #0xff00
> + cmp r0, #(0x20 << 8)
> + beq 1f
> +#ifdef CONFIG_ARCH_TEGRA_3x_SOC
> + /* Clear the flow controller flags for this CPU. */
> + mov32 r2, TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_CPU0_CSR @ CPU0 CSR
> + ldr r1, [r2]
> + /* Clear event & intr flag */
> + orr r1, r1, \
> + #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
> + movw r0, #0x0FFD @ enable, cluster_switch, immed, & bitmaps
> + bic r1, r1, r0
> + str r1, [r2]
> +#endif
> +1:
couldn't that entire quoted chunk go inside the ifdef; all of reading
the HIDREV register and the 1: label?
next prev parent reply other threads:[~2012-10-09 22:29 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-08 10:26 [PATCH 0/7] ARM: tegra30: cpuidle: add LP2 support Joseph Lo
2012-10-08 10:26 ` [PATCH 1/7] ARM: tegra: cpuidle: separate cpuidle driver for different chips Joseph Lo
2012-10-09 22:22 ` Stephen Warren
2012-10-11 6:42 ` Joseph Lo
2012-10-08 10:26 ` [PATCH 2/7] ARM: tegra: cpuidle: add LP2 resume function Joseph Lo
2012-10-09 22:29 ` Stephen Warren [this message]
2012-10-11 7:08 ` Joseph Lo
2012-10-08 10:26 ` [PATCH 3/7] ARM: tegra30: cpuidle: add LP2 driver for secondary CPUs Joseph Lo
2012-10-08 16:35 ` Lorenzo Pieralisi
2012-10-09 4:13 ` Joseph Lo
2012-10-09 8:38 ` Lorenzo Pieralisi
2012-10-09 9:18 ` Joseph Lo
2012-10-09 9:42 ` Lorenzo Pieralisi
2012-10-09 22:38 ` Stephen Warren
2012-10-11 9:15 ` Joseph Lo
2012-10-11 16:24 ` Stephen Warren
2012-10-12 3:21 ` Joseph Lo
[not found] ` <87sj8vr517.fsf@amiettinen-lnx.nvidia.com>
2012-10-30 22:27 ` Stephen Warren
2012-10-31 1:26 ` Joseph Lo
2012-10-08 10:26 ` [PATCH 4/7] ARM: tegra30: common: enable csite clock Joseph Lo
2012-10-09 22:38 ` Stephen Warren
2012-10-11 10:28 ` Joseph Lo
2012-10-08 10:26 ` [PATCH 5/7] ARM: tegra30: clocks: add CPU low-power function into tegra_cpu_car_ops Joseph Lo
2012-10-08 10:26 ` [PATCH 6/7] ARM: tegra30: flowctrl: add cpu_suspend_exter/exit function Joseph Lo
2012-10-08 10:26 ` [PATCH 7/7] ARM: tegra30: cpuidle: add LP2 driver for CPU0 Joseph Lo
2012-10-09 22:49 ` Stephen Warren
2012-10-11 11:24 ` Joseph Lo
2012-10-11 16:37 ` Stephen Warren
2012-10-11 16:48 ` Colin Cross
2012-10-12 7:11 ` Joseph Lo
2012-10-12 7:40 ` Joseph Lo
2012-10-12 7:54 ` Shawn Guo
2012-10-12 8:24 ` Joseph Lo
2012-10-12 8:30 ` Shawn Guo
2012-10-12 20:50 ` Colin Cross
2012-10-15 16:28 ` Use coupled cpuidle on imx6q Shawn Guo
2012-10-15 22:58 ` Colin Cross
2012-10-12 20:46 ` [PATCH 7/7] ARM: tegra30: cpuidle: add LP2 driver for CPU0 Colin Cross
2012-10-12 7:07 ` Joseph Lo
2012-10-12 21:04 ` Stephen Warren
2012-10-15 7:56 ` Joseph Lo
2012-10-15 15:59 ` Stephen Warren
2012-10-15 22:33 ` Colin Cross
2012-10-16 8:13 ` Peter De Schrijver
2012-10-16 8:06 ` Peter De Schrijver
2012-10-16 17:03 ` Stephen Warren
2012-10-18 9:24 ` Peter De Schrijver
2012-10-25 14:08 ` Peter De Schrijver
2012-10-09 22:26 ` [PATCH 0/7] ARM: tegra30: cpuidle: add LP2 support Stephen Warren
2012-10-11 6:39 ` Joseph Lo
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