Subject: [PATCH 3/7] ARM: tegra30: cpuidle: add LP2 driver for secondary CPUs

From: [email-masked] (Stephen Warren)
Date: Tue, 30 Oct 2012 16:27:25 -0600

On 10/30/2012 04:03 PM, Antti P Miettinen wrote:
> Joseph Lo <[email-masked]> writes:
>>>>>> +	writel(tegra_in_lp2.bits[0], tegra_cpu_lp2_mask);
> 
> BTW, writel_relaxed() would probably be more than enough? IRAM is mapped
> stronly ordered, isn't it? And there's an explicit dsb(). And the mask
> is observed and written only by CPUs. If there are coherence issues,
> they would be in the fabric? And then neither CPU barriers nor L2 sync
> would help, you'd need a readback, right?

I expect there are many places where we simply default to using
readl/writel (e.g. due to cut/paste, their prevalence, etc.) rather than
explicitly using the _relaxed variants if we can. Perhaps we should do a
pass through all the Tegra code and clean that up sometime.