From: gregory.clement@free-electrons•com (Gregory CLEMENT)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH V2 1/5] arm: mvebu: Added support for coherency fabric in mach-mvebu
Date: Mon, 12 Nov 2012 21:21:07 +0100 [thread overview]
Message-ID: <50A15A33.60405@free-electrons.com> (raw)
In-Reply-To: <20121105140258.GO3351@mudshark.cambridge.arm.com>
Hi Will,
On 11/05/2012 03:02 PM, Will Deacon wrote:
> Hi Gregory,
>
> On Mon, Oct 29, 2012 at 09:11:44PM +0000, Gregory CLEMENT wrote:
>> diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
>> new file mode 100644
>> index 0000000..69e130d
>> --- /dev/null
>> +++ b/arch/arm/mach-mvebu/coherency.c
>> @@ -0,0 +1,89 @@
>> +/*
>> + * Coherency fabric (Aurora) support for Armada 370 and XP platforms.
>> + *
>> + * Copyright (C) 2012 Marvell
>> + *
>> + * Yehuda Yitschak <yehuday@marvell•com>
>> + * Gregory Clement <gregory.clement@free-electrons•com>
>> + * Thomas Petazzoni <thomas.petazzoni@free-electrons•com>
>> + *
>> + * This file is licensed under the terms of the GNU General Public
>> + * License version 2. This program is licensed "as is" without any
>> + * warranty of any kind, whether express or implied.
>> + *
>> + * The Armada 370 and Armada XP SOCs have a coherency fabric which is
>> + * responsible for ensuring hardware coherency between all CPUs and between
>> + * CPUs and I/O masters. This file initializes the coherency fabric and
>> + * supplies basic routines for configuring and controlling hardware coherency
>> + */
>
> [...]
>
>> +int set_cpu_coherent(unsigned int hw_cpu_id, int smp_group_id)
>> +{
>> + int reg;
>> +
>> + if (!coherency_base) {
>> + pr_warn("Can't make CPU %d cache coherent.\n", hw_cpu_id);
>> + pr_warn("Coherency fabric is not initialized\n");
>> + return 1;
>> + }
>> +
>> + /* Enable the CPU in coherency fabric */
>> + reg = readl(coherency_base + COHERENCY_FABRIC_CTL_OFFSET);
>> + reg |= 1 << (24 + hw_cpu_id);
>> + writel(reg, coherency_base + COHERENCY_FABRIC_CTL_OFFSET);
>> +
>> + /* Add CPU to SMP group */
>> + reg = readl(coherency_base + COHERENCY_FABRIC_CFG_OFFSET);
>> + reg |= 1 << (16 + hw_cpu_id + (smp_group_id == 0 ? 8 : 0));
>> + writel(reg, coherency_base + COHERENCY_FABRIC_CFG_OFFSET);
>> +
>> + return 0;
>> +}
>
> These writels may expand to code containing calls to outer_sync(), which
> will attempt to take a spinlock for the aurora l2. Given that the CPU isn't
> coherent, how does this play out with the exclusive store instruction in the
> lock?
I dug a little this subject: and I am not sure there is problem. In SMP mode,
only the system cache mode of Aurora is used. In this mode, outer_cache.sync
is void then outer_sync() won't call any function, so there will be no
access to any spinlock.
Gregory
next prev parent reply other threads:[~2012-11-12 20:21 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-29 21:11 [PATCH V2 0/5] SMP support for Armada XP Gregory CLEMENT
2012-10-29 21:11 ` [PATCH V2 1/5] arm: mvebu: Added support for coherency fabric in mach-mvebu Gregory CLEMENT
2012-11-05 14:02 ` Will Deacon
2012-11-05 23:53 ` Gregory CLEMENT
2012-11-12 20:21 ` Gregory CLEMENT [this message]
2012-11-13 10:43 ` Will Deacon
2012-11-14 20:00 ` Gregory CLEMENT
2012-11-15 10:17 ` Will Deacon
2012-11-15 15:54 ` Gregory CLEMENT
2012-11-15 16:21 ` Will Deacon
2012-11-15 16:49 ` Gregory CLEMENT
2012-11-16 18:56 ` Will Deacon
2012-11-16 19:25 ` Gregory CLEMENT
2012-11-19 10:32 ` Will Deacon
2012-10-29 21:11 ` [PATCH V2 2/5] arm: mvebu: Added initial support for power managmement service unit Gregory CLEMENT
2012-11-05 14:05 ` Will Deacon
2012-11-14 0:07 ` Russell King - ARM Linux
2012-11-14 9:46 ` Will Deacon
2012-10-29 21:11 ` [PATCH V2 3/5] arm: mvebu: Added IPI support via doorbells Gregory CLEMENT
2012-10-29 21:11 ` [PATCH V2 4/5] arm: mm: Added support for PJ4B cpu and init routines Gregory CLEMENT
2012-11-13 15:15 ` Gregory CLEMENT
2012-11-13 22:53 ` Will Deacon
2012-11-14 0:14 ` Russell King - ARM Linux
2012-10-29 21:11 ` [PATCH V2 5/5] arm: mvebu: Added SMP support for Armada XP Gregory CLEMENT
2012-11-12 20:49 ` [PATCH V2 0/5] " Gregory CLEMENT
2012-11-12 22:32 ` Arnd Bergmann
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