From: swarren@wwwdotorg•org (Stephen Warren)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 5/5] ARM: tegra20: cpuidle: apply coupled cpuidle for powered-down mode
Date: Mon, 03 Dec 2012 11:52:40 -0700 [thread overview]
Message-ID: <50BCF4F8.60606@wwwdotorg.org> (raw)
In-Reply-To: <1354503607-13707-6-git-send-email-josephl@nvidia.com>
On 12/02/2012 08:00 PM, Joseph Lo wrote:
> The "powered-down" cpuidle mode of Tegra20 needs the CPU0 be the last one
> core to go into this mode before other core. The coupled cpuidle framework
> can help to sync the MPCore to coupled state then go into "powered-down"
> idle mode together. The driver can just assume the MPCore come into
> "powered-down" mode at the same time. No need to take care if the CPU_0
> goes into this mode along and only can put it into safe idle mode (WFI).
I wonder if it wouldn't be simpler to squash this patch into one of the
earlier patches, and just use coupled cpuidle from the very start?
> +static int __cpuinit tegra20_idle_lp2_coupled(struct cpuidle_device *dev,
> + struct cpuidle_driver *drv,
> + int index)
> - if (cpu == 0) {
> - if (last_cpu)
> - entered_lp2 = tegra20_cpu_cluster_power_down(dev, drv,
> - index);
> - else
> - cpu_do_idle();
> - } else {
> + if (cpu == 0)
> + entered_lp2 = tegra20_cpu_cluster_power_down(dev, drv, index);
> + else
> entered_lp2 = tegra20_idle_enter_lp2_cpu_1(dev, drv, index);
> - }
So I assume that coupled cpuidle only calls this function on CPU 0 once
it has guaranteed that CPU n are all in this same idle state. What does
CPU 0 do now, when it wants to enter LP2 but can't because CPU n aren't
in LP2? Do we need to explicitly provide some kind of function to
implement this waiting state, or does coupled cpuidle ensure the LP3 is
entered, or implement WFI itself, or ...?
> @@ -258,6 +256,9 @@ int __init tegra20_cpuidle_init(void)
> +#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
> + dev->coupled_cpus = *cpu_online_mask;
> +#endif
What if that changes; I assume couple cpuidle handles that by
registering a notifier?
Is there any way that the kernel can boot with only CPU 0 "plugged in",
but later have the other CPU hotplugged in? In other words, should that
hard-code a mask (3?) that describes the HW, rather than relying on the
runtime hotplug status? (think about what happens when this idle code is
moved into drivers/cpuidle/ and built as a module, and hence could be
initialized with only 1 CPU hotplugged in).
next prev parent reply other threads:[~2012-12-03 18:52 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-03 3:00 [PATCH 0/5] ARM: tegra20: cpuidle: add power-down state Joseph Lo
2012-12-03 3:00 ` [PATCH 1/5] ARM: tegra20: cpuidle: add powered-down state for secondary CPU Joseph Lo
2012-12-03 18:18 ` Stephen Warren
2012-12-04 6:47 ` Joseph Lo
2012-12-03 18:31 ` Stephen Warren
2012-12-04 7:05 ` Joseph Lo
2012-12-05 18:36 ` Stephen Warren
2012-12-03 3:00 ` [PATCH 2/5] ARM: tegra20: clocks: add CPU low-power function into tegra_cpu_car_ops Joseph Lo
2012-12-03 18:20 ` Stephen Warren
2012-12-04 4:28 ` Joseph Lo
2012-12-04 5:12 ` Prashant Gaikwad
2012-12-04 5:25 ` Joseph Lo
2012-12-05 18:34 ` Stephen Warren
2012-12-03 3:00 ` [PATCH 3/5] ARM: tegra20: flowctrl: add support for cpu_suspend_enter/exit Joseph Lo
2012-12-03 3:00 ` [PATCH 4/5] ARM: tegra20: cpuidle: add powered-down state for CPU0 Joseph Lo
2012-12-03 18:40 ` Stephen Warren
2012-12-04 7:25 ` Joseph Lo
2012-12-03 3:00 ` [PATCH 5/5] ARM: tegra20: cpuidle: apply coupled cpuidle for powered-down mode Joseph Lo
2012-12-03 18:52 ` Stephen Warren [this message]
2012-12-04 10:20 ` Joseph Lo
2012-12-04 12:41 ` Peter De Schrijver
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