From: swarren@wwwdotorg•org (Stephen Warren)
To: linux-arm-kernel@lists•infradead.org
Subject: [RFC v1] PCIe support for the Armada 370 and Armada XP SoCs
Date: Tue, 11 Dec 2012 14:21:09 -0700 [thread overview]
Message-ID: <50C7A3C5.7050100@wwwdotorg.org> (raw)
In-Reply-To: <20121211075207.GA29977@avionic-0098.adnet.avionic-design.de>
On 12/11/2012 12:52 AM, Thierry Reding wrote:
> On Mon, Dec 10, 2012 at 10:52:33AM -0700, Stephen Warren wrote:
>> On 12/07/2012 04:33 PM, Jason Gunthorpe wrote:
>>> On Fri, Dec 07, 2012 at 11:04:23PM +0100, Thomas Petazzoni
>>> wrote:
>>>
>>>> * The most annoying problem is that when the hw_pci->setup()
>>>> operation is called, we don't know the size of the memory and
>>>> I/O regions that each PCI device will need. And on Marvell
>>>> SoCs, for each PCI device, we have to set up an address
>>>> decoding window that associates a portion of the physical
>>>> address space with a given
>>>
>>> I think a sane way to address this is to model the SOC as the
>>> root of the PCI-E and then model each of the ports as a
>>> non-compliant PCI-E bridge. The internal memory windows
>>> functionally map exactly to a PCI-E bridge memory window - just
>>> with annoyingly different register settings.
>>
>> Mainly as background:
>>
>> I /think/ Tegra has a similar HW setup (but perhaps not
>> identical) (based on a very brief reading of your emails and
>> brief knowledge of this aspect of the Tegra HW).
>>
>> On Tegra, there is a 1GB physical address window that the PCIe
>> controller serves. The controller has 2 or 3 ports, each a
>> separate PCIe domain I believe. There are registers in the PCIe
>> controller which route accessed made to the 1GB physical window
>> to the various child ports and transaction types.
>
> No, the ports on Tegra are not separate PCIe domains. The
> configuration space mapping is shared between all ports and is
> programmed in the register space of the PCIe controller. This is
> what PCIe refers to as ECAM, only with a slightly incompatible
> mapping.
OK, so can you please remind me why the top-level PCIe controller node
has a child node for each port, with hard-coded non-intersecting
ranges for configuration space access? If they all go through the same
address range, and use standard PCI bridge registers to route
transactions to the separate ports, I would have expected no need for
explicit per-port sub-nodes or static address allocations.
next prev parent reply other threads:[~2012-12-11 21:21 UTC|newest]
Thread overview: 107+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-07 22:04 [RFC v1] PCIe support for the Armada 370 and Armada XP SoCs Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 01/16] lib: devres: don't enclose pcim_*() functions in CONFIG_HAS_IOPORT Thomas Petazzoni
2012-12-11 10:43 ` Arnd Bergmann
2012-12-11 16:03 ` Thomas Petazzoni
2012-12-11 16:15 ` Arnd Bergmann
2012-12-11 16:23 ` Russell King - ARM Linux
2012-12-11 16:38 ` Thomas Petazzoni
2012-12-11 16:50 ` Russell King - ARM Linux
2012-12-11 17:29 ` Alan Cox
2012-12-11 22:20 ` Arnd Bergmann
2012-12-11 22:34 ` Arnd Bergmann
2012-12-11 16:30 ` Thomas Petazzoni
2012-12-11 16:46 ` Russell King - ARM Linux
2012-12-11 17:32 ` Alan Cox
2012-12-11 22:28 ` Arnd Bergmann
2012-12-11 16:55 ` Russell King - ARM Linux
2012-12-11 16:26 ` Russell King - ARM Linux
2012-12-11 17:16 ` Alan Cox
2012-12-11 17:34 ` Russell King - ARM Linux
2012-12-11 17:45 ` Alan Cox
2012-12-11 17:51 ` Russell King - ARM Linux
2012-12-07 22:04 ` [RFC v1 02/16] clk: mvebu: create parent-child relation for PCIe clocks on Armada 370 Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 03/16] arm: plat-orion: introduce WIN_CTRL_ENABLE in address mapping code Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 04/16] arm: plat-orion: refactor the orion_disable_wins() function Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 05/16] arm: plat-orion: introduce orion_{alloc, free}_cpu_win() functions Thomas Petazzoni
2012-12-08 11:53 ` [RFC v1 05/16] arm: plat-orion: introduce orion_{alloc,free}_cpu_win() functions Andrew Lunn
2012-12-08 12:15 ` Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 06/16] arm: mvebu: add functions to alloc/free PCIe decoding windows Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 07/16] arm: plat-orion: make common PCIe code usable on mvebu Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 08/16] arm: mvebu: the core PCIe driver Thomas Petazzoni
2012-12-10 8:28 ` Andrew Lunn
2012-12-10 8:45 ` Thomas Petazzoni
2012-12-10 19:08 ` Jason Gunthorpe
2012-12-11 10:56 ` Arnd Bergmann
2012-12-12 15:58 ` Thomas Petazzoni
2012-12-12 21:51 ` Jason Gunthorpe
2012-12-13 14:58 ` Arnd Bergmann
2012-12-13 17:40 ` Jason Gunthorpe
2012-12-13 19:09 ` Thomas Petazzoni
2012-12-14 19:34 ` Rob Herring
2012-12-13 12:19 ` Arnd Bergmann
2012-12-13 17:54 ` Jason Gunthorpe
2012-12-13 19:12 ` Thomas Petazzoni
2012-12-13 21:46 ` Arnd Bergmann
2012-12-13 22:27 ` Jason Gunthorpe
2012-12-07 22:04 ` [RFC v1 09/16] arm: mvebu: PCIe support is now available on mvebu Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 10/16] arm: mvebu: add PCIe Device Tree informations for Armada 370 Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 11/16] arm: mvebu: add PCIe Device Tree informations for Armada XP Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 12/16] arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 13/16] arm: mvebu: PCIe Device Tree informations for Armada XP DB Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 14/16] arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 15/16] arm: mvebu: PCIe Device Tree informations for Armada 370 DB Thomas Petazzoni
2012-12-07 22:04 ` [RFC v1 16/16] arm: mvebu: update defconfig with PCI and USB support Thomas Petazzoni
2012-12-07 23:33 ` [RFC v1] PCIe support for the Armada 370 and Armada XP SoCs Jason Gunthorpe
2012-12-10 17:52 ` Stephen Warren
2012-12-10 18:05 ` Thomas Petazzoni
2012-12-10 18:16 ` Stephen Warren
2012-12-10 18:59 ` Thomas Petazzoni
2012-12-10 19:07 ` Jason Gunthorpe
2012-12-10 20:08 ` Stephen Warren
2012-12-10 18:44 ` Jason Gunthorpe
2012-12-10 19:03 ` Thomas Petazzoni
2012-12-10 19:18 ` Jason Gunthorpe
2012-12-12 16:04 ` Thomas Petazzoni
2012-12-12 20:09 ` Jason Gunthorpe
2012-12-16 13:02 ` Thierry Reding
2012-12-11 7:52 ` Thierry Reding
2012-12-11 21:21 ` Stephen Warren [this message]
2012-12-12 20:34 ` Thierry Reding
2012-12-12 22:30 ` Stephen Warren
2012-12-13 7:03 ` Thierry Reding
2012-12-13 8:04 ` Jason Gunthorpe
2012-12-13 8:23 ` Thierry Reding
2012-12-13 18:12 ` Stephen Warren
2012-12-13 20:42 ` Thierry Reding
2012-12-13 20:47 ` Jason Gunthorpe
2012-12-13 21:16 ` Thierry Reding
2012-12-14 10:05 ` Thierry Reding
2012-12-14 15:10 ` Thierry Reding
2012-12-14 17:27 ` Jason Gunthorpe
2012-12-16 12:33 ` Thierry Reding
2012-12-17 18:29 ` Jason Gunthorpe
2012-12-17 19:41 ` Thierry Reding
2012-12-18 2:10 ` Stephen Warren
2012-12-18 2:51 ` Jason Gunthorpe
2012-12-18 17:03 ` Stephen Warren
2012-12-20 15:32 ` Thierry Reding
2012-12-21 13:38 ` Jay Agarwal
2012-12-21 14:03 ` Thierry Reding
2012-12-22 14:50 ` Thomas Petazzoni
2012-12-28 21:06 ` Thierry Reding
2012-12-28 21:16 ` Thomas Petazzoni
2012-12-28 23:49 ` Stephen Warren
2012-12-29 8:09 ` Thomas Petazzoni
2012-12-31 16:40 ` Stephen Warren
2012-12-29 9:33 ` Thierry Reding
2012-12-31 16:44 ` Stephen Warren
2013-01-02 20:09 ` Jason Gunthorpe
2013-01-03 14:20 ` Thierry Reding
2012-12-28 23:51 ` Stephen Warren
2012-12-18 7:32 ` Thierry Reding
2013-01-03 14:39 ` Thierry Reding
2013-01-03 15:00 ` Bjorn Helgaas
2013-01-03 15:11 ` Thierry Reding
2013-01-03 15:09 ` Thomas Petazzoni
2013-01-03 15:56 ` Arnd Bergmann
2013-01-03 16:01 ` Thierry Reding
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