From: santosh.shilimkar@ti•com (Santosh Shilimkar)
To: linux-arm-kernel@lists•infradead.org
Subject: [RFC PATCH v2 3/5] ARM: kernel: update cpu_suspend code to use cache LoUIS operations
Date: Thu, 13 Dec 2012 15:39:57 +0100 [thread overview]
Message-ID: <50C9E8BD.1020501@ti.com> (raw)
In-Reply-To: <Pine.LNX.4.64.1212131522430.18586@axis700.grange>
On Thursday 13 December 2012 03:32 PM, Guennadi Liakhovetski wrote:
> On Thu, 13 Dec 2012, Will Deacon wrote:
>
>> On Thu, Dec 13, 2012 at 08:09:33AM +0000, Guennadi Liakhovetski wrote:
>>> On Wed, 12 Dec 2012, Will Deacon wrote:
>>>> Back to the case in hand.... Lorenzo just pointed out to me that the
>>>> finished in question (sh7372_do_idle_sysc) calls v7_flush_dcache_all, so
>>>> the louis stuff should be irrelevant. The problem may actually be that the
>>>> finisher disables the L2 cache prior to cleaning/invalidating it, which is
>>>> the opposite order to that described by the A8 TRM.
>>>>
>>>> Guennadi -- can you try moving the kernel_flush call before the L2 disable
>>>> in sh7372_do_idle_sysc please?
>>>
>>> Yes, this works too.
>>
>> That's good to know. Please can you send a patch for that? The sequence
>> currently being used by the finisher *is* buggy, and should be fixed
>> independently of the louis stuff.
>
> Well, the fix is yours, so, it should be "From: you." I can certainly send
> it just copying your description above, but I'd also need your Sob.
> Something like the below (feel free to improve the subject line and the
> description):
>
> From: Will Deacon <will.deacon@arm•com>
> Subject: [PATCH] ARM: sh7372: fix cache clean / invalidate order
>
> According to the Cortex A8 TRM the L2 cache should be first cleaned and
> then disabled. Fix the swapped order on sh7372.
>
> Signed-off-by: <you>
> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx•de>
> (or even just)
> Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx•de>
>
> diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S
> index 1d56467..df15d8a 100644
> --- a/arch/arm/mach-shmobile/sleep-sh7372.S
> +++ b/arch/arm/mach-shmobile/sleep-sh7372.S
> @@ -59,16 +59,16 @@ sh7372_do_idle_sysc:
> mcr p15, 0, r0, c1, c0, 0
> isb
>
> - /* disable L2 cache in the aux control register */
> - mrc p15, 0, r10, c1, c0, 1
> - bic r10, r10, #2
> - mcr p15, 0, r10, c1, c0, 1
> -
> /*
> * Invalidate data cache again.
> */
kernel_flush does "Clean and Invalidate"
> ldr r1, kernel_flush
> blx r1
> +
> + /* disable L2 cache in the aux control register */
> + mrc p15, 0, r10, c1, c0, 1
> + bic r10, r10, #2
> + mcr p15, 0, r10, c1, c0, 1
An isb will be make it safe.
Otherwise patch looks good to me.
Feel free to add my review-by tag if you need one.
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti•com>
next prev parent reply other threads:[~2012-12-13 14:39 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-18 16:35 [RFC PATCH v2 0/5] ARM: augment cache flushing API Lorenzo Pieralisi
2012-09-18 16:35 ` [RFC PATCH v2 1/5] ARM: mm: implement LoUIS API for cache maintenance ops Lorenzo Pieralisi
2012-09-18 18:12 ` Nicolas Pitre
2012-09-19 12:30 ` Lorenzo Pieralisi
2012-09-18 16:35 ` [RFC PATCH v2 2/5] ARM: mm: rename jump labels in v7_flush_dcache_all function Lorenzo Pieralisi
2012-09-18 18:13 ` Nicolas Pitre
2012-09-19 13:51 ` Dave Martin
2012-09-20 10:32 ` Lorenzo Pieralisi
2012-09-20 11:01 ` Dave Martin
2012-09-18 16:35 ` [RFC PATCH v2 3/5] ARM: kernel: update cpu_suspend code to use cache LoUIS operations Lorenzo Pieralisi
2012-09-18 18:18 ` Nicolas Pitre
2012-09-19 13:46 ` Dave Martin
2012-09-20 10:25 ` Lorenzo Pieralisi
2012-09-20 11:04 ` Dave Martin
2012-12-11 16:07 ` Guennadi Liakhovetski
2012-12-11 16:33 ` Will Deacon
2012-12-11 16:38 ` Will Deacon
2012-12-11 17:07 ` Guennadi Liakhovetski
2012-12-11 17:47 ` Will Deacon
2012-12-11 17:55 ` Guennadi Liakhovetski
2012-12-11 23:27 ` Stephen Boyd
2012-12-12 10:31 ` Will Deacon
2012-12-12 16:43 ` Guennadi Liakhovetski
2012-12-12 10:33 ` Lorenzo Pieralisi
2012-12-12 13:36 ` Will Deacon
2012-12-13 8:09 ` Guennadi Liakhovetski
2012-12-13 10:51 ` Will Deacon
2012-12-13 14:32 ` Guennadi Liakhovetski
2012-12-13 14:39 ` Santosh Shilimkar [this message]
2012-12-28 11:32 ` [PATCH v2] ARM: sh7372: fix cache clean / invalidate order Guennadi Liakhovetski
2012-12-28 21:50 ` Simon Horman
2012-12-13 14:52 ` [RFC PATCH v2 3/5] ARM: kernel: update cpu_suspend code to use cache LoUIS operations Will Deacon
2012-12-12 16:43 ` Guennadi Liakhovetski
2012-09-18 16:35 ` [RFC PATCH v2 4/5] ARM: kernel: update __cpu_disable to use cache LoUIS maintenance API Lorenzo Pieralisi
2012-09-18 18:19 ` Nicolas Pitre
2012-09-18 16:35 ` [RFC PATCH v2 5/5] ARM: mm: update __v7_setup() to the new LoUIS cache " Lorenzo Pieralisi
2012-09-18 18:20 ` Nicolas Pitre
2012-09-20 11:27 ` [RFC PATCH v2 0/5] ARM: augment cache flushing API Lorenzo Pieralisi
2012-09-21 8:07 ` Shawn Guo
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