From: maxime.ripard@free-electrons•com (Maxime Ripard)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 1/6] ARM: sunxi: Add pinctrl driver for Allwinner SoCs
Date: Mon, 07 Jan 2013 16:50:42 +0100 [thread overview]
Message-ID: <50EAEED2.8020003@free-electrons.com> (raw)
In-Reply-To: <CACRpkdYpnfWmo15vtUsvPobhFO3_wvYgaa04Mpa6QjWx2h+ezA@mail.gmail.com>
Hi Linus,
Le 07/01/2013 00:46, Linus Walleij a ?crit :
> On Wed, Dec 19, 2012 at 9:18 PM, Maxime Ripard
> <maxime.ripard@free-electrons•com> wrote:
>
>> The Allwinner SoCs have an IP module that handle both the muxing and the
>> GPIOs.
>
> Sorry for very slow review :-( :-(
That's fine, at that time of the year, I wasn't expecting a fast review
anyway :)
>> include/linux/pinctrl/pinconf-generic.h | 1 +
>
> Can you break this into a separate patch and rebase it?
>
> It does not apply anymore after v3.8...
Ah, yes, of course... Will do.
>> diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h
>> index 4f0abb9..5f5968d 100644
>> --- a/include/linux/pinctrl/pinconf-generic.h
>> +++ b/include/linux/pinctrl/pinconf-generic.h
>> @@ -74,6 +74,7 @@ enum pin_config_param {
>> PIN_CONFIG_DRIVE_PUSH_PULL,
>> PIN_CONFIG_DRIVE_OPEN_DRAIN,
>> PIN_CONFIG_DRIVE_OPEN_SOURCE,
>> + PIN_CONFIG_DRIVE_CURRENT,
>> PIN_CONFIG_INPUT_SCHMITT,
>> PIN_CONFIG_INPUT_DEBOUNCE,
>> PIN_CONFIG_POWER_SOURCE,
>
> Above the definitions there is some kerneldoc and that is where this has to be
> defined.
>
> You also have to defines what the argument to this parameter is.
>
> I think it should be renamed PIN_CONFIG_DRIVE_STRENGTH and the
> argument should be the number of drivers stages.
>
> These things are constructed with totem-pole-like outputs and the number
> of totempoles define the drive strength, usually it will be something like
>
> 1 = 2mA
> 2 = 4mA
> 3 = 6mA
> 4 = 8mA
>
> or similar, as you see 2 mA for each added driver stage. The driver can
> convert to any internal representation...
Ok, I will do it.
Do you have other comments on the driver that I should wait for before
sending a v3?
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
next prev parent reply other threads:[~2013-01-07 15:50 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-19 20:18 [PATCHv2 0/6] Add pinctrl driver for Allwinner A1X SoCs Maxime Ripard
2012-12-19 20:18 ` [PATCH 1/6] ARM: sunxi: Add pinctrl driver for Allwinner SoCs Maxime Ripard
2013-01-06 23:46 ` Linus Walleij
2013-01-07 15:50 ` Maxime Ripard [this message]
2013-01-17 9:55 ` Linus Walleij
2012-12-19 20:18 ` [PATCH 2/6] ARM: pinctrl: sunxi: Add the pinctrl pin set for sun5i Maxime Ripard
2012-12-19 20:18 ` [PATCH 3/6] ARM: sunxi: Add pinctrl node to the device tree Maxime Ripard
2012-12-19 20:18 ` [PATCH 4/6] ARM: sunxi: Add uart1 pinctrl groups Maxime Ripard
2012-12-19 20:18 ` [PATCH 5/6] tty: of_serial: Add pinctrl support Maxime Ripard
2012-12-19 20:18 ` [PATCH 6/6] ARM: sunxi: olinuxino: Add muxing for the uart Maxime Ripard
-- strict thread matches above, loose matches on Subject: below --
2012-12-10 22:08 [PATCH 0/6] Add pinctrl driver for Allwinner A1X SoCs Maxime Ripard
2012-12-10 22:08 ` [PATCH 1/6] ARM: sunxi: Add pinctrl driver for Allwinner SoCs Maxime Ripard
2012-12-11 0:28 ` Linus Walleij
2012-12-11 18:30 ` Maxime Ripard
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