Subject: [PATCH 2/3] ARM: davinci: da850: Enable EHRPWM TBCLK from CFG_CHIP1

From: [email-masked] (Sekhar Nori)
Date: Thu, 14 Mar 2013 18:31:52 +0530

On 3/14/2013 4:07 PM, Philip Avinash wrote:
> da850 platforms require TBCLK synchronization in CFG_CHIP1 register for
> TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM
> DT node status is set to "okay" DT blob.
> Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and
> DA8XX_CFGCHIP1_REG.

So there is actually a TBCLK in DA850 - it's just not modeled as a clock
similar to the way it is done on AM335x? If yes, then instead of adding
a dummy clock node and doing the TBCLK enable as part of init, why not
model TBCLK in clock tree even on DA850?

Thanks,
Sekhar