From: gerlando.falauto@keymile•com (Gerlando Falauto)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v3 0/9] refactoring for mask_cache
Date: Thu, 21 Mar 2013 12:24:06 +0100 [thread overview]
Message-ID: <514AEDD6.7010707@keymile.com> (raw)
In-Reply-To: <20130321105110.GB16903@kw.sim.vm.gnt>
Hi Simon,
On 03/21/2013 11:51 AM, Simon Guinot wrote:
> On Mon, Mar 18, 2013 at 03:00:46PM +0100, Gerlando Falauto wrote:
>> Hi everyone,
>> here is a patchset to address the issue found with Orion, in incremental
>> stages as Thomas suggested.
>> a) we introduce the new fields and pointer (though only the shared one is used)
>> b) we convert all drivers to use it
>> c) we rename the field so to force the use of the per-ct pointer
>> d) we add per-ct mask cache, provided the new flag
>> IRQ_GC_SEPARATE_MASK_REGISTERS is enabled
>> e) we enable the flag for orion-gpio and mvebu drivers
>>
>> So even though I'm also providing changes for mvebu, I only
>> tested the patch on a 3.0.40 kernel with the plat-orion/gpio.c driver.
>> We currently do not have a working 3.6+ configuration for our Kirkwood
>> boards (3.6 is apparently where this mvebu gpio driver was introduced),
>> so I would be glad if someone could give it a try.
>> I also have no idea whether the three Marvell variants all have separate
>> mask registers (which is what the last patch assumes).
>>
>> Gerlando Falauto (9):
>> genirq: cosmetic: remove cur_regs
>> genirq: add mask_cache and pmask_cache into struct irq_chip_type
>> gpio: mvebu: convert to usage of *pmask_cache within irq_chip_type
>> MIPS: JZ4740: convert to usage of *pmask_cache within irq_chip_type
>> ARM: SAMSUNG: convert to usage of *pmask_cache within irq_chip_type
>> genirq: rename mask_cache to shared_mask_cache
>> genirq: handle separate mask registers
>> orion-gpio: enable IRQ_GC_SEPARATE_MASK_REGISTERS
>> gpio: mvebu: enable IRQ_GC_SEPARATE_MASK_REGISTERS
>>
>> arch/arm/plat-orion/gpio.c | 3 +-
>> arch/arm/plat-samsung/irq-vic-timer.c | 6 ++--
>> arch/mips/jz4740/irq.c | 3 +-
>> drivers/gpio/gpio-mvebu.c | 23 ++++++++------
>> include/linux/irq.h | 9 ++++--
>> kernel/irq/generic-chip.c | 55 +++++++++++++++++++++------------
>> 6 files changed, 64 insertions(+), 35 deletions(-)
>
> Hi Gerlando,
>
> On a Network Space v2 Max board (Kirkwood SoC), I have verified that
> both the GPIO drivers mvebu-gpio and orion-gpio are impacted by the bug.
>
> I have also checked that this patch series fixes the bug for each of
> them.
>
> Thanks
Great!
Will you then offer a Tested-By? (on the last two patches, I guess)?
Thanks!
Gerlando
next prev parent reply other threads:[~2013-03-21 11:24 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-14 16:10 [PATCH] genirq: allow an alternative setup for the mask cache Holger Brunck
2013-03-14 17:45 ` Simon Guinot
2013-03-15 10:43 ` Holger Brunck
2013-03-15 11:02 ` Thomas Gleixner
2013-03-15 16:26 ` Gerlando Falauto
2013-03-15 19:55 ` Thomas Gleixner
2013-03-14 19:08 ` Thomas Gleixner
2013-03-14 19:42 ` Ezequiel Garcia
2013-03-18 11:05 ` Gerlando Falauto
2013-03-15 19:36 ` [PATCH v2 0/2] refactoring for mask_cache Gerlando Falauto
2013-03-15 19:36 ` [PATCH 1/2] genirq: cosmetic: remove cur_regs Gerlando Falauto
2013-03-15 19:36 ` [PATCH 2/2] genirq: move mask_cache into struct irq_chip_type Gerlando Falauto
2013-03-15 20:47 ` Thomas Gleixner
2013-03-18 7:59 ` Gerlando Falauto
2013-03-18 8:56 ` Thomas Gleixner
2013-03-15 21:25 ` [PATCH v2 0/2] refactoring for mask_cache Andrew Lunn
2013-03-15 23:34 ` Simon Guinot
2013-03-18 14:00 ` [PATCH v3 0/9] " Gerlando Falauto
2013-03-18 14:00 ` [PATCH v3 1/9] genirq: cosmetic: remove cur_regs Gerlando Falauto
2013-03-18 14:00 ` [PATCH v3 2/9] genirq: add mask_cache and pmask_cache into struct irq_chip_type Gerlando Falauto
2013-03-19 11:32 ` Thomas Gleixner
2013-03-18 14:00 ` [PATCH v3 3/9] gpio: mvebu: convert to usage of *pmask_cache within irq_chip_type Gerlando Falauto
2013-03-18 14:00 ` [PATCH v3 4/9] MIPS: JZ4740: " Gerlando Falauto
2013-03-18 14:00 ` [PATCH v3 5/9] ARM: SAMSUNG: " Gerlando Falauto
2013-03-18 14:00 ` [PATCH v3 6/9] genirq: rename mask_cache to shared_mask_cache Gerlando Falauto
2013-03-18 14:00 ` [PATCH v3 7/9] genirq: handle separate mask registers Gerlando Falauto
2013-03-18 14:00 ` [PATCH v3 8/9] orion-gpio: enable IRQ_GC_SEPARATE_MASK_REGISTERS Gerlando Falauto
2013-03-18 14:00 ` [PATCH v3 9/9] gpio: mvebu: " Gerlando Falauto
2013-03-18 14:28 ` [PATCH v3 0/9] refactoring for mask_cache Simon Guinot
2013-03-18 14:39 ` Simon Guinot
2013-03-19 10:03 ` Ezequiel Garcia
2013-03-19 10:09 ` Gerlando Falauto
2013-03-19 11:25 ` Ezequiel Garcia
2013-03-19 11:06 ` Jason Cooper
2013-03-19 11:10 ` Gerlando Falauto
2013-03-19 11:44 ` Jason Cooper
2013-03-19 11:56 ` Jason Cooper
2013-03-20 17:40 ` Gerlando Falauto
2013-03-20 21:42 ` Thomas Gleixner
2013-03-21 10:37 ` Gerlando Falauto
2013-03-21 10:59 ` Simon Guinot
2013-03-19 11:19 ` Ezequiel Garcia
2013-03-21 10:51 ` Simon Guinot
2013-03-21 11:24 ` Gerlando Falauto [this message]
2013-04-04 9:31 ` Ezequiel Garcia
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=514AEDD6.7010707@keymile.com \
--to=gerlando.falauto@keymile$(echo .)com \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox