From: santosh.shilimkar@ti•com (Santosh Shilimkar)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v2 17/18] ARM: OMAP4+: CPUidle: Add OMAP5 idle driver support
Date: Fri, 5 Apr 2013 15:11:32 +0530 [thread overview]
Message-ID: <515E9C4C.3020709@ti.com> (raw)
In-Reply-To: <87li8ymb84.fsf@linaro.org>
On Thursday 04 April 2013 11:25 PM, Kevin Hilman wrote:
> Santosh Shilimkar <santosh.shilimkar@ti•com> writes:
>
>> On Thursday 04 April 2013 02:55 AM, Kevin Hilman wrote:
>>> Santosh Shilimkar <santosh.shilimkar@ti•com> writes:
>>>
>>>> The OMAP5 idle driver can re-use OMAP4 CPUidle driver implementation thanks
>>>> to compatible MPUSS design.
>>>>
>>>> Though unlike OMAP4, on OMAP5 devices, MPUSS CSWR (Close Switch
>>>> Retention) power states can be achieved with respective power states
>>>> on CPU0 and CPU1 power domain. This mode was broken on OMAP4 devices
>>>> because of hardware limitation.
>>>
>>> I'm a bit confused by the description here.
>>>
>>> I gather from the code that this means that CPU0 and CPU1 can hit CSWR
>>> independently, correct?
>>>
>> They can be programmed independently without any ordering(like
>> CPU0 last etc), but the actual transition to the low power CSWR
>> happens together. Till that the first CPU hit WFI remains in WFI
>> state waiting for other CPU to hit WFI and then both transition
>> together.
>> Completely managed inside hardware.
>
> OK, elaborating this in the changelog would be helpful. Use the "will I
> understand this changelog in a year" rule to see if the changelog is
> detailed enough. Or better, "will Kevin understand this changelog in a
> year." (hint: the answer is usually no.) ;)
>
:-) I added above description in change-log.
>>>> Also there is no CPU low power entry order requirement like
>>>> master CPU etc for CSWR C-state, which is icing on the cake.
>>>
>>> Even on secure devices?
>>>
>> Yes. On secure devices too. Actually since we don't loose context,
>> secure entry/exit doesn't come into picture.
>>
>>>> Code makes use of voting scheme for cluster low power state to support
>>>> MPUSS CSWR C-state.
>>>
>>> The voting scheme and associated locking should be better described
>>> here, or commented in the code itself.
>>>
>> You are right. It deserves some description.
>>
>>>> Supported OMAP5 CPUidle C-states:
>>>> C1 - CPU0 ON(WFI) + CPU1 ON(WFI) + MPUSS ON
>>>> C2 - CPU0 CSWR + CPU1 CSWR + MPUSS CSWR
>>>> C3 - CPU0 OFF + CPU1 OFF + MPUSS OSWR
>>>>
>>>> Acked-by: Nishanth Menon <nm@ti•com>
>>>> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti•com>
>>>
>>> [...]
>>>
>>>> +static int omap_enter_idle_smp(struct cpuidle_device *dev,
>>>> + struct cpuidle_driver *drv,
>>>> + int index)
>>>> +{
>>>> + struct idle_statedata *cx = state_ptr + index;
>>>> + int cpu_id = smp_processor_id();
>>>> + unsigned long flag;
>>>> +
>>>> + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
>>>
>>> I think the CPUidle core handles the broadcast notification now.
>>>
>> Not in mainline yet. And those patches came after my patches and
>> I don't wanted un-necessary merge dependency, I avoided it. Its trivial
>> though to drop if from here once the idle next is merged.
>
> OK.
>
> I believe that stuff is already queued, no? Maybe ahave this as an
> add-on separate patch that can be used for your loal testing, but does
> not go upstream.
>
Will do.
> I would only include this if you're sure the other series is not going
> upstream.
>
It might go upstream so I will manually apply the patch or pull a branch
if available.
>>>> + raw_spin_lock_irqsave(&mpu_lock, flag);
>>>> + cx->mpu_state_vote++;
>>>
>>> How about using an atomic_t and atomic_inc()/atomic_dec() instead, which
>>> will avoid the need for a spinlock.
>>>
>> Spin lock is not just for the vote variable. I had atomics opps in first
>> version I gave it to product team. But they found a race condition in
>> where MPU power state was getting overwritten by other CPU.
>>
>>> Even with that, it still seems potentially racy. Do you need a memory
>>> barrier here to be sure that any changes from another CPU are visible
>>> here, and vice versa?
>>>
>> With locks, you don't need barriers since the updated copy is guaranteed.
>
> It's guaranteed because the spinlock implementation uses barriers.
>
Yeah.
>> Can you please elaborate on potential race ? I have given pretty hard
>> thought and didn't see any race which can be exposed with locks in place.
>
> I was referring to using atomic ops. With atomic ops, you'd need an
> explicit barrier (which you're getting inside the spinlock
> implementation)
>
> That being said, I have not thought through all the corner cases as you
> have, so I'll defer to your choice (as long as it's well documented.)
> If you decide to stick with spinlocks, be sure to describe all of what
> the spinlock is protecting, and why.
>
Have updated the change-log as well as code to elaborate the lock use.
Thanks for review.
Regards,
Santosh
next prev parent reply other threads:[~2013-04-05 9:41 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-25 10:04 [PATCH v2 00/18] ARM: OMAP5: PM: Add MPUSS suspend and CPUidle support Santosh Shilimkar
2013-03-25 10:04 ` [PATCH v2 01/18] ARM: OMAP4+: PM: Consolidate MPU subsystem PM code for re-use Santosh Shilimkar
2013-04-03 19:44 ` Kevin Hilman
2013-04-04 11:32 ` Santosh Shilimkar
2013-03-25 10:04 ` [PATCH v2 02/18] ARM: OMAP5: PM: Update CPU context register offset Santosh Shilimkar
2013-03-25 10:04 ` [PATCH v2 03/18] ARM: OMAP4+: PM: Consolidate and use OMAP4 PM code for OMAP5 Santosh Shilimkar
2013-04-03 20:20 ` Kevin Hilman
2013-04-04 11:51 ` Santosh Shilimkar
2013-04-04 11:55 ` Santosh Shilimkar
2013-03-25 10:04 ` [PATCH v2 04/18] ARM: OMAP5: PM: Set MPUSS-EMIF clock-domain static dependency Santosh Shilimkar
2013-03-25 10:04 ` [PATCH v2 05/18] ARM: OMAP5: PM: Enables ES2 PM mode by default Santosh Shilimkar
2013-04-03 20:25 ` Kevin Hilman
2013-04-04 12:02 ` Santosh Shilimkar
2013-03-25 10:04 ` [PATCH v2 06/18] ARM: OMAP5: PM: Enable Mercury retention mode on CPUx powerdomains Santosh Shilimkar
2013-04-03 20:31 ` Kevin Hilman
2013-04-04 12:08 ` Santosh Shilimkar
2013-03-25 10:04 ` [PATCH v2 07/18] ARM: OMAP5: Add init_late() hook to enable pm initialization Santosh Shilimkar
2013-04-03 20:33 ` Kevin Hilman
2013-04-04 12:28 ` Santosh Shilimkar
2013-03-25 10:05 ` [PATCH v2 08/18] ARM: OMAP5: PM: Add CPU power off in hotplug path Santosh Shilimkar
2013-04-03 20:49 ` Kevin Hilman
2013-04-04 13:23 ` Santosh Shilimkar
2013-04-04 17:31 ` Kevin Hilman
2013-04-05 9:04 ` Santosh Shilimkar
2013-03-25 10:05 ` [PATCH v2 09/18] ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method Santosh Shilimkar
2013-04-03 20:54 ` Kevin Hilman
2013-04-04 13:37 ` Santosh Shilimkar
2013-04-04 17:42 ` Kevin Hilman
2013-04-05 9:07 ` Santosh Shilimkar
2013-04-05 11:58 ` Santosh Shilimkar
2013-03-25 10:05 ` [PATCH v2 10/18] ARM: OMAP5: PM: Add MPU Open Switch Retention support Santosh Shilimkar
2013-03-25 10:05 ` [PATCH v2 11/18] ARM: OMAP5: PM: Add L2 memory power down support Santosh Shilimkar
2013-04-03 20:58 ` Kevin Hilman
2013-04-04 13:46 ` Santosh Shilimkar
2013-03-25 10:05 ` [PATCH v2 12/18] ARM: OMAP4: CPUidle: Avoid double idle driver registration Santosh Shilimkar
2013-04-03 21:03 ` Kevin Hilman
2013-04-04 13:47 ` Santosh Shilimkar
2013-03-25 10:05 ` [PATCH v2 13/18] ARM: OMAP: CPUidle: Unregister drivere on device registration failure Santosh Shilimkar
2013-04-03 21:03 ` Kevin Hilman
2013-04-04 13:48 ` Santosh Shilimkar
2013-03-25 10:05 ` [PATCH v2 14/18] ARM: OMAP4: CPUidle: Make C-state description field more precise Santosh Shilimkar
2013-04-03 21:05 ` Kevin Hilman
2013-04-04 13:48 ` Santosh Shilimkar
2013-03-25 10:05 ` [PATCH v2 15/18] ARM: OMAP4+: CPUidle: Consolidate idle driver for OMAP5 support Santosh Shilimkar
2013-04-03 21:10 ` Kevin Hilman
2013-04-04 14:04 ` Santosh Shilimkar
2013-03-25 10:05 ` [PATCH v2 16/18] ARM: OMAP4+: CPUidle: Deprecate use of omap4_mpuss_read_prev_context_state() Santosh Shilimkar
2013-04-03 21:37 ` Kevin Hilman
2013-04-04 13:59 ` Santosh Shilimkar
2013-03-25 10:05 ` [PATCH v2 17/18] ARM: OMAP4+: CPUidle: Add OMAP5 idle driver support Santosh Shilimkar
2013-04-03 21:25 ` Kevin Hilman
2013-04-04 14:16 ` Santosh Shilimkar
2013-04-04 17:55 ` Kevin Hilman
2013-04-05 9:41 ` Santosh Shilimkar [this message]
2013-03-25 10:05 ` [PATCH v2 18/18] ARM: OMAP5: PM: handle device instance for warm reset Santosh Shilimkar
2013-03-25 11:46 ` [PATCH v2 00/18] ARM: OMAP5: PM: Add MPUSS suspend and CPUidle support Lokesh Vutla
2013-03-25 12:10 ` Santosh Shilimkar
2013-03-25 12:27 ` Sourav Poddar
2013-03-25 12:47 ` Rajendra Nayak
2013-03-25 13:00 ` Sourav Poddar
2013-04-03 22:52 ` Kevin Hilman
2013-04-04 14:34 ` Santosh Shilimkar
2013-04-04 16:49 ` Santosh Shilimkar
2013-04-04 17:57 ` Kevin Hilman
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