Subject: [PATCHv2 1/4] Documentation: Add memory mapped ARM architected timer binding

From: [email-masked] (Stephen Boyd)
Date: Mon, 15 Apr 2013 14:33:37 -0700

On 04/15/13 14:20, Rob Herring wrote:
> On Fri, Apr 12, 2013 at 7:27 PM, Stephen Boyd <[email-masked]> wrote:
>> @@ -26,3 +30,52 @@ Example:
>>                              <1 10 0xf08>;
>>                 clock-frequency = <100000000>;
>>         };
>> +
>> +** Memory mapped timer node properties
>> +
>> +- compatible : Should at least contain "arm,armv7-timer-mem".
> Everything about this timer is architecturally defined? If not, let's
> use a more specific name.

I'm not sure I'm following you, but everything described here is part of
the ARM definition. What would be a more specific name?

>
>> +
>> +- clock-frequency : The frequency of the main counter, in Hz. Optional.
>> +
>> +- reg : The control frame base address.
>> +
>> +Note that #address-cells, #size-cells, and ranges shall be present to ensure
>> +the CPU can address a frame's registers.
>> +
>> +Frame:
>> +
>> +- frame-number: 0 to 7.
> I'd really like to get rid of the frame numbers and sub-nodes. Is the
> frame number significant to software?

We need the frame number to read and write registers in the control
frame (the first base in the parent node). We currently use it to
determine if a frame has support for the virtual timer by reading the
CNTTIDR (a register with 4 bits per frame describing capabilities). If
we wanted to control access to the second view of a frame we would also
need to configure the CNTPL0ACRn register that pertains to the frame
we're controlling. Without a frame number we wouldn't know which
register to write.

>
>> +- interrupts : Interrupt list for physical and virtual timers in that order.
>> +  The virtual timer interrupt is optional.
> Is that optional per frame?

Yes the virtual and physical timer interrupt is per-frame and the
virtual interrupt is optional.

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