From: swarren@wwwdotorg•org (Stephen Warren)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 1/6] ARM: tegra: add an assembly marco to check Tegra SoC ID
Date: Wed, 15 May 2013 16:43:48 -0600 [thread overview]
Message-ID: <51940FA4.6050609@wwwdotorg.org> (raw)
In-Reply-To: <1368613644-11863-2-git-send-email-josephl@nvidia.com>
On 05/15/2013 04:27 AM, Joseph Lo wrote:
> There are some Tegra SoC ID checking code around the low level assembly
> code. Adding a marco to replace them. For the single image to support all
> the Tegra series, we may also need the marco in other common code. So we
> make it become a marco for the usage.
I'm not sure this patch doesn't obfuscate the code too much. The big
issue I see is:
> @@ -115,13 +112,9 @@ ENTRY(__tegra_cpu_reset_handler)
>
> cpsid aif, 0x13 @ SVC mode, interrupts disabled
>
> - mov32 r6, TEGRA_APB_MISC_BASE
> - ldr r6, [r6, #APB_MISC_GP_HIDREV]
> - and r6, r6, #0xff00
> -#ifdef CONFIG_ARCH_TEGRA_2x_SOC
> -t20_check:
> - cmp r6, #(0x20 << 8)
> + tegra_check_soc_id TEGRA20, TEGRA_APB_MISC_BASE, r6, r5
Here, we replace all the code with the new macro, ...
> #ifdef CONFIG_ARCH_TEGRA_2x_SOC
> /* Are we on Tegra20? */
> - cmp r6, #(0x20 << 8)
> + cmp r6, #(TEGRA20 << 8)
But here we still have to write out the cmp instructions.
It may be reasonable to create a macro to read/mask/shift the SoC ID,
similar to the existing cpu_id macro, i.e. roughly:
/* Macro to check Tegra revision */
+#define APB_MISC_GP_HIDREV 0x804
+.macro tegra_soc_id base, tmp1, tmp2
+ mov32 \tmp2, \base
+ ldr \tmp1, [\tmp2, #APB_MISC_GP_HIDREV]
+ and \tmp1, \tmp1, #0xff00
+.endm
Also, I wonder:
(a) why the need to pass TEGRA_APB_MISC_BASE into the macro; can't the
macro just hard-code that value since it's always the same?
(b) Why need two registers passed to the macro. At least one of the code
segments you've replaced with the macro uses a single register instead:
- mov32 r6, TEGRA_APB_MISC_BASE
- ldr r6, [r6, #APB_MISC_GP_HIDREV]
- and r6, r6, #0xff00
Wouldn't that be a better implementation of the macro? I don't think
relying on \tmp2 containing "base" after the macro invocation would be a
good idea, since that's rather like looking inside the black box.
next prev parent reply other threads:[~2013-05-15 22:43 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-15 10:27 [PATCH 0/6] ARM: tegra114: add CPU hotplug support Joseph Lo
2013-05-15 10:27 ` [PATCH 1/6] ARM: tegra: add an assembly marco to check Tegra SoC ID Joseph Lo
2013-05-15 22:43 ` Stephen Warren [this message]
2013-05-16 10:09 ` Joseph Lo
2013-05-16 18:21 ` Stephen Warren
2013-05-15 10:27 ` [PATCH 2/6] ARM: tegra: skip SCU and PL310 code when CPU is not Cortex-A9 Joseph Lo
2013-05-15 22:48 ` Stephen Warren
2013-05-16 10:13 ` Joseph Lo
2013-05-15 10:27 ` [PATCH 3/6] ARM: tegra: make tegra_resume can work for Tegra114 Joseph Lo
2013-05-15 22:57 ` Stephen Warren
2013-05-16 10:35 ` Joseph Lo
2013-05-16 18:24 ` Stephen Warren
2013-05-15 10:27 ` [PATCH 4/6] ARM: tegra114: add power up sequence for warm boot CPU Joseph Lo
2013-05-15 10:27 ` [PATCH 5/6] clk: tegra114: implement wait_for_reset and disable_clock for tegra_cpu_car_ops Joseph Lo
2013-05-15 23:02 ` Stephen Warren
2013-05-16 19:17 ` Mike Turquette
2013-05-15 10:27 ` [PATCH 6/6] ARM: tegra114: add CPU hotplug support Joseph Lo
2013-05-15 23:11 ` Stephen Warren
2013-05-16 11:14 ` Joseph Lo
2013-05-16 18:26 ` Stephen Warren
2013-05-15 23:38 ` [PATCH 0/6] " Stephen Warren
2013-05-16 9:53 ` Joseph Lo
2013-05-16 18:19 ` Stephen Warren
2013-05-17 10:15 ` Joseph Lo
2013-05-17 10:27 ` Russell King - ARM Linux
2013-05-17 10:23 ` Russell King - ARM Linux
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