From: marc.zyngier@arm•com (Marc Zyngier)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 05/10] ARM: sunxi: Add Allwinner A31 DTSI
Date: Tue, 30 Jul 2013 09:59:02 +0100 [thread overview]
Message-ID: <51F78056.6000104@arm.com> (raw)
In-Reply-To: <1374618312-19001-6-git-send-email-maxime.ripard@free-electrons.com>
Hi Maxime,
On 23/07/13 23:25, Maxime Ripard wrote:
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons•com>
> ---
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/sun6i-a31.dtsi | 155 +++++++++++++++++++++++++++++++++++++++
> 2 files changed, 157 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/sun6i-a31.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 641b3c9..1482533 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -210,7 +210,8 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
> sun4i-a10-mini-xplus.dtb \
> sun4i-a10-hackberry.dtb \
> sun5i-a10s-olinuxino-micro.dtb \
> - sun5i-a13-olinuxino.dtb
> + sun5i-a13-olinuxino.dtb \
> + sun6i-a31-colombus.dtb
> dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
> tegra20-iris-512.dtb \
> tegra20-medcom-wide.dtb \
> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
> new file mode 100644
> index 0000000..c6c19a9
> --- /dev/null
> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
> @@ -0,0 +1,155 @@
> +/*
> + * Copyright 2013 Maxime Ripard
> + *
> + * Maxime Ripard <maxime.ripard@free-electrons•com>
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +/include/ "skeleton.dtsi"
> +
[...]
> + gic: interrupt-controller at 01c81000 {
> + compatible = "arm,cortex-a7-gic";
> + reg = <0x01c81000 0x1000>, <0x01c82000 0x100>;
Th Cortex A7 TRM indicates that its GIC has the virtualization
extensions. You should reflect this in the binding (wider GICC range,
GICH and GICV ranges, maintenance interrupt).
See
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0464d/BGBJFJJA.html
for details.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2013-07-30 8:59 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-23 22:25 [PATCH 00/10] ARM: sunxi: Add support for the Allwinner A31 SoC Maxime Ripard
2013-07-23 22:25 ` [PATCH 01/10] irqchip: GIC: Add Cortex-A7 compatible string Maxime Ripard
2013-07-23 22:25 ` [PATCH 02/10] clk: sunxi: fix initialization of basic clocks Maxime Ripard
2013-07-23 22:25 ` [PATCH 03/10] ARM: sunxi: Add the Allwinner A31 compatible to the machine definition Maxime Ripard
2013-07-26 10:35 ` Thomas Petazzoni
2013-07-26 12:22 ` Maxime Ripard
2013-07-23 22:25 ` [PATCH 04/10] ARM: sun6i: Add restart code for the A31 Maxime Ripard
2013-07-26 10:35 ` Thomas Petazzoni
2013-07-26 12:23 ` Maxime Ripard
2013-07-29 14:04 ` Mark Rutland
2013-07-30 12:44 ` Maxime Ripard
2013-07-23 22:25 ` [PATCH 05/10] ARM: sunxi: Add Allwinner A31 DTSI Maxime Ripard
2013-07-26 10:37 ` Thomas Petazzoni
2013-07-26 12:48 ` Maxime Ripard
2013-07-29 14:11 ` Mark Rutland
2013-07-30 8:59 ` Marc Zyngier [this message]
2013-07-30 13:18 ` Maxime Ripard
2013-07-23 22:25 ` [PATCH 06/10] ARM: sun6i: Add WITS Colombus A31 evaluation kit support Maxime Ripard
2013-07-23 22:25 ` [PATCH 07/10] pinctrl: sunxi: Add Allwinner A31 pins set Maxime Ripard
2013-07-29 16:20 ` Linus Walleij
2013-07-30 9:00 ` Maxime Ripard
2013-07-23 22:25 ` [PATCH 08/10] ARM: sunxi: dt: Add PIO controller to A31 DTSI Maxime Ripard
2013-07-26 10:39 ` Thomas Petazzoni
2013-07-23 22:25 ` [PATCH 09/10] ARM: sun6i: Add UART0 muxing options Maxime Ripard
2013-07-23 22:25 ` [PATCH 10/10] ARM: sun6i: colombus: Add uart0 muxing Maxime Ripard
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