From: swarren@wwwdotorg•org (Stephen Warren)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 4/7] ARM: tegra: add LP1 support code for Tegra124
Date: Wed, 09 Oct 2013 17:20:45 -0600 [thread overview]
Message-ID: <5255E4CD.1050509@wwwdotorg.org> (raw)
In-Reply-To: <1381310411-11391-5-git-send-email-josephl@nvidia.com>
On 10/09/2013 03:20 AM, Joseph Lo wrote:
> The LP1 suspend procedure is the same with Tegra30 and Tegra114. Just
> need to update the difference of the register address, then we can
> continue to share the code.
> diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
> tegra114_sdram_pad_size:
> - .word tegra30_sdram_pad_size - tegra114_sdram_pad_address
> + .word tegra124_sdram_pad_address - tegra114_sdram_pad_address
Why not put label tegra30_sdram_pad_address_end after the Tegra30 table
and tegra114_sdram_pad_address_end after the Tegra114 table, etc. That
way, you won't have to modify previous chips when you add a new one.
> .type tegra30_sdram_pad_save, %object
> tegra30_sdram_pad_save:
Shouldn't that name be tegra_xxx not tegra30_xxx, since I think the same
register save area is used for all SoCs?
> - .rept (tegra30_sdram_pad_size - tegra114_sdram_pad_address) / 4
> + .rept (tegra124_sdram_pad_address - tegra114_sdram_pad_address) / 4
I assume this is intended to reserve enough space to store all the saved
registers for the largest table of tegra30_sdram_pad_address,
tegra114_sdram_pad_address, tegra124_sdram_pad_address. I count more
entries in the existing Tegra114 table than the new Tegra124 table, so
I'm not sure this part of the change is correct.
Is there no way to do a max(tegra30 size, tegra114 size, tegra124 size)
so you don't have to pick manually which size to reserve here?
next prev parent reply other threads:[~2013-10-09 23:20 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-09 9:20 [PATCH 0/7] ARM: tegra: support LP1 suspend mode for Tegra124 Joseph Lo
2013-10-09 9:20 ` [PATCH 1/7] clk: tegra124: add suspend/resume function for tegra_cpu_car_ops Joseph Lo
2013-10-09 9:26 ` Joseph Lo
2013-10-09 23:12 ` Stephen Warren
2013-10-09 9:20 ` [PATCH 2/7] ARM: tegra: add flow controller to support suspend for Tegra124 Joseph Lo
2013-10-09 23:21 ` Stephen Warren
2013-10-09 9:20 ` [PATCH 3/7] ARM: tegra: hook tegra_cpu_tear_down " Joseph Lo
2013-10-09 9:20 ` [PATCH 4/7] ARM: tegra: add LP1 support code " Joseph Lo
2013-10-09 23:20 ` Stephen Warren [this message]
2013-10-11 7:38 ` Joseph Lo
2013-10-11 15:40 ` Stephen Warren
2013-10-09 9:20 ` [PATCH 5/7] ARM: tegra: hook the LP1 iram code area and sleep_core function " Joseph Lo
2013-10-09 23:25 ` Stephen Warren
2013-10-09 9:20 ` [PATCH 6/7] ARM: tegra: enable Tegra RTC for Venice2 Joseph Lo
2013-10-09 23:27 ` Stephen Warren
2013-10-09 9:20 ` [PATCH 7/7] ARM: tegra: enable LP1 suspend mode " Joseph Lo
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