Subject: [PATCH v5 15/15] usb: phy-mxs: Add sync time after controller clear phcd

From: [email-masked] (Marc Kleine-Budde)
Date: Mon, 09 Dec 2013 11:00:39 +0100

On 12/09/2013 10:19 AM, Peter Chen wrote:
> On Mon, Dec 09, 2013 at 10:05:17AM +0100, Marc Kleine-Budde wrote:
>> On 12/09/2013 07:31 AM, Peter Chen wrote:
>>> After clear portsc.phcd, PHY needs 200us stable time for switch
>>> 32K clock to AHB clock.
>>
>> If this is a general bugbix, please move it to the start of this series
>> and add stable on Cc. I think I hit the bug on the second USB port of a
>> custom MX28 board, the stmp_reset_block() in the USB phy will fail.
> 
> Not a bug-fix, just the requirement for the PHY leaves low power mode.
> Does the bug exists with my this patchset, or just current mainline code?

I see, I found this strange thing on v3.8, but can try on v3.13-rc3.

Marc

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