From: kgene.kim@samsung•com (Kukjin Kim)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 1/3] ARM: EXYNOS: Add exynos5 CPU clock divider offsets
Date: Sat, 21 Dec 2013 06:23:44 +0900 [thread overview]
Message-ID: <52B4B560.6030001@samsung.com> (raw)
In-Reply-To: <1386323284-15646-2-git-send-email-arun.kk@samsung.com>
On 12/06/13 18:48, Arun Kumar K wrote:
> Adds the CPU clock divider shifts and masks for Exynos5 SoC.
> These defines will be used in cpufreq driver.
>
> Signed-off-by: Arjun.K.V<arjun.kv@samsung•com>
> Signed-off-by: Arun Kumar K<arun.kk@samsung•com>
> ---
> arch/arm/mach-exynos/include/mach/regs-clock.h | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h
> index d36ad76..d0186d3 100644
> --- a/arch/arm/mach-exynos/include/mach/regs-clock.h
> +++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
> @@ -347,6 +347,30 @@
>
> #define EXYNOS5_EPLLCON0_LOCKED_SHIFT (29)
>
> +/* CLK_DIV_CPU0 */
> +#define EXYNOS5_CLKDIV_CPU0_CORE_SHIFT 0
> +#define EXYNOS5_CLKDIV_CPU0_CORE_MASK (0x7<< EXYNOS5_CLKDIV_CPU0_CORE_SHIFT)
> +#define EXYNOS5_CLKDIV_CPU0_CPUD_SHIFT 4
> +#define EXYNOS5_CLKDIV_CPU0_CPUD_MASK (0x7<< EXYNOS5_CLKDIV_CPU0_CPUD_SHIFT)
> +#define EXYNOS5_CLKDIV_CPU0_ACP_SHIFT 8
> +#define EXYNOS5_CLKDIV_CPU0_ACP_MASK (0x7<< EXYNOS5_CLKDIV_CPU0_ACP_SHIFT)
> +#define EXYNOS5_CLKDIV_CPU0_ATB_SHIFT 16
> +#define EXYNOS5_CLKDIV_CPU0_ATB_MASK (0x7<< EXYNOS5_CLKDIV_CPU0_ATB_SHIFT)
> +#define EXYNOS5_CLKDIV_CPU0_PCLKDBG_SHIFT 20
> +#define EXYNOS5_CLKDIV_CPU0_PCLKDBG_MASK (0x7<< EXYNOS5_CLKDIV_CPU0_PCLKDBG_SHIFT)
> +#define EXYNOS5_CLKDIV_CPU0_APLL_SHIFT 24
> +#define EXYNOS5_CLKDIV_CPU0_APLL_MASK (0x7<< EXYNOS5_CLKDIV_CPU0_APLL_SHIFT)
> +#define EXYNOS5_CLKDIV_CPU0_CORE2_SHIFT 28
> +#define EXYNOS5_CLKDIV_CPU0_CORE2_MASK (0x7<< EXYNOS5_CLKDIV_CPU0_CORE2_SHIFT)
> +
> +/* CLK_DIV_CPU1 */
> +#define EXYNOS5_CLKDIV_CPU1_COPY_SHIFT 0
> +#define EXYNOS5_CLKDIV_CPU1_COPY_MASK (0x7<< EXYNOS5_CLKDIV_CPU1_COPY_SHIFT)
> +#define EXYNOS5_CLKDIV_CPU1_HPM_SHIFT 4
> +#define EXYNOS5_CLKDIV_CPU1_HPM_MASK (0x7<< EXYNOS5_CLKDIV_CPU1_HPM_SHIFT)
> +#define EXYNOS5_CLKSRC_CPU_MUXCORE_SHIFT 16
> +#define EXYNOS5_CLKMUX_STATCPU_MUXCORE_MASK (0x7<< EXYNOS5_CLKSRC_CPU_MUXCORE_SHIFT)
> +
> #define PWR_CTRL1_CORE2_DOWN_RATIO (7<< 28)
> #define PWR_CTRL1_CORE1_DOWN_RATIO (7<< 16)
> #define PWR_CTRL1_DIV2_DOWN_EN (1<< 9)
Hi Arun,
Above definitions should be moved into regarding driver not into arch.
Please see my current for-next, there is no <mach/regs-clock.h>.
Thanks,
Kukjin
next prev parent reply other threads:[~2013-12-20 21:23 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-06 9:48 [PATCH 0/3] Exynos5420 Cpufreq support Arun Kumar K
2013-12-06 9:48 ` [PATCH 1/3] ARM: EXYNOS: Add exynos5 CPU clock divider offsets Arun Kumar K
2013-12-20 21:23 ` Kukjin Kim [this message]
2013-12-06 9:48 ` [PATCH 2/3] clk: exynos5420: Add alias names for cpu clocks Arun Kumar K
2013-12-19 8:00 ` Mike Turquette
2013-12-06 9:48 ` [PATCH 3/3] cpufreq: exynos: Add exynos5420 cpufreq driver Arun Kumar K
2013-12-09 8:23 ` Lukasz Majewski
2013-12-10 4:40 ` Arun Kumar K
2013-12-10 16:32 ` Lukasz Majewski
2013-12-17 7:07 ` Jassi Brar
2013-12-17 8:14 ` Lukasz Majewski
2013-12-17 8:21 ` Arun Kumar K
2013-12-17 6:12 ` Viresh Kumar
2013-12-17 8:00 ` Lukasz Majewski
2013-12-17 8:03 ` Viresh Kumar
2013-12-17 8:05 ` Arun Kumar K
2013-12-17 9:09 ` Lukasz Majewski
2013-12-17 8:03 ` Arun Kumar K
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