Subject: [PATCH v2 16/16] ASoC: fsl-ssi: Use regmap

From: [email-masked] (Timur Tabi)
Date: Thu, 20 Mar 2014 10:10:09 -0500

On 03/20/2014 01:07 AM, Li.Xiubo at freescale.com wrote:
> While for the scenario like our LS1(ARM) platform.
> CPU		SSI
> LE		BE	then should we set the .val_format_endian to
> 			REGMAP_ENDIAN_BIG
>
>
> And so not only for PowerPC, but also maybe for ARM platforms.
> So here how about just adding one Boolean property like 'big-endian' in DT node
> to learn the endianness of the devices dynamically ?

That's not a bad idea.  The property should be something like, 
"fsl,ssi-endian" and is should be set to "big", "little", or "native". 
In the absence of the property, it should default to native endian.