Subject: [PATCH 2/3] mtd: davinci-nand: add dts property for NAND_NO_SUBPAGE_WRITE option

From: [email-masked] (Santosh Shilimkar)
Date: Thu, 20 Mar 2014 15:11:48 -0400

On Thursday 20 March 2014 02:54 PM, Brian Norris wrote:
> On Thu, Mar 20, 2014 at 02:02:39PM -0400, Santosh Shilimkar wrote:
>> On Thursday 20 March 2014 01:44 PM, Warner Losh wrote:
>>> I though sub page writing was one of the fields in the onfi and/or jedec(toggle) meta data structures. Have you looked there?
>>>
>> Am not sure if I follow you. The limitation is from the TI NAND controller(AEMIF) and
>> not the NAND memory. 
> 
> That doesn't match the patch description, which says "that flash doesn't
> support subpage writing". Flash != flash controller.
>
Patch description is indeed doesn't reflect the actual issue.

> Which one is it? If it's a controller limitation, I think we should be
> able to pull this from a "compatible" property, no?
> 
Just to be accurate, the limitation(bug) is on the controller found on Keystone
SOCs. AEMIF controller is also used on DaVinci SOCs which don't seems to have
any issue. So even for compatible, you need to add keystone specific one.
Hence thought dt property is better option.

regards,
Santosh