Subject: [PATCH v5 07/14] ARM: mvebu: Extend the pmsu registers

From: [email-masked] (Sebastian Hesselbarth)
Date: Wed, 26 Mar 2014 13:04:55 +0100

On 03/25/2014 11:48 PM, Gregory CLEMENT wrote:
> The initial binding for PMSU were wrong. It didn't take into account
> all the registers from the PMSU and moreover it referred to registers
> which are not part of PMSU.
>
> The Power Management Unit Service block also controls the Coherency
> Fabric subsystem. These registers are needed for the CPU idle
> implementation for the Armada 370/XP, it allows to enter a deep CPU
> idle state where the Coherency Fabric and the L2 cache are powered
> down.
>
> This commit add support for a new compatible for the PMSU node
> including the block related to the coherency fabric. It also keeps
> compatibility with the old binding
>
> This patch also adds warnings if one of the base registers set can't
> be ioremapped.
>
> Signed-off-by: Gregory CLEMENT <[email-masked]>
> ---
>   arch/arm/mach-mvebu/pmsu.c | 47 +++++++++++++++++++++++++++++++++++++++++-----
>   1 file changed, 42 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
> index d71ef53107c4..865bcb651e01 100644
> --- a/arch/arm/mach-mvebu/pmsu.c
> +++ b/arch/arm/mach-mvebu/pmsu.c
[...]
> +static void __init armada_370_xp_pmsu_legacy_init(struct device_node *np)
> +{
> +	u32 addr;
> +	pr_warn("*** Warning ***  Using an old binding which will be deprecated\n");
> +	/* We just need the adress, we already know the size */
> +	addr = be32_to_cpu(*of_get_address(np, 0, NULL, NULL));
> +	addr -= PMSU_BASE_OFFSET;
> +	pmsu_mp_base = ioremap(addr, PMSU_REG_SIZE);
> +	of_node_put(np);

When messing with OF passed resources, I suggest to use
of_address_to_resource() and work on the struct resource
instead. The be32_to_cpu pointing to an immediate just looks
strange.

Sebastian