From: nsekhar@ti•com (Sekhar Nori)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v2 3/3] ARM: OMAP2+: AM43x: L2 cache support
Date: Thu, 10 Apr 2014 17:46:14 +0530 [thread overview]
Message-ID: <53468B8E.9040604@ti.com> (raw)
In-Reply-To: <20140410120348.GK27282@n2100.arm.linux.org.uk>
On Thursday 10 April 2014 05:33 PM, Russell King - ARM Linux wrote:
> On Thu, Apr 10, 2014 at 05:26:15PM +0530, Sekhar Nori wrote:
>> On Wednesday 09 April 2014 09:53 PM, Russell King - ARM Linux wrote:
>>> That is required because as part of the enable sequence, we write to the
>>> lockdown registers to clear out anything that may be there before we
>>> enable the L2 cache. If we didn't set the NS lockdown bit, then we
>>> would need the secure monitor to do it for us.
>>
>> And I realized yesterday that the only reason L2C is working on AM437x
>> is because AM437x ROM is setting these bits up for us.
>>
>>> Both of these bits should be managed within the L2C code rather than by
>>> platforms.
>>
>> The current L2C code is not managing the NS_LOCKDOWN bit. I can take a
>> shot at adding this support unless you are already looking at it.
>
> True, and I'm aware that it's missing. So... how about this on top
> of my series so far. We can deal with L310_AUX_CTRL_NS_INT_CTRL when
> the need to access those registers arises (if/when the edac driver
> is submitted.)
>
> diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
> index c0f9a81a2d32..4a494cde8367 100644
> --- a/arch/arm/mach-omap2/omap4-common.c
> +++ b/arch/arm/mach-omap2/omap4-common.c
> @@ -213,8 +213,6 @@ static int __init omap_l2_cache_init(void)
>
> /* 16-way associativity, parity disabled, way size - 64KB (es2.0 +) */
> aux_ctrl = L310_AUX_CTRL_CACHE_REPLACE_RR |
> - L310_AUX_CTRL_NS_LOCKDOWN |
> - L310_AUX_CTRL_NS_INT_CTRL |
> L2C_AUX_CTRL_SHARED_OVERRIDE |
> L310_AUX_CTRL_DATA_PREFETCH |
> L310_AUX_CTRL_INSTR_PREFETCH;
> diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
> index 98796b789eb9..837f384c1d51 100644
> --- a/arch/arm/mm/cache-l2x0.c
> +++ b/arch/arm/mm/cache-l2x0.c
> @@ -776,6 +776,13 @@ static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock)
> power_ctrl & L310_STNDBY_MODE_EN ? "en" : "dis");
> }
>
> + /*
> + * Always enable non-secure access to the lockdown registers -
> + * we write to them as part of the L2C enable sequence so they
> + * need to be accessible.
> + */
> + aux |= L310_AUX_CTRL_NS_LOCKDOWN;
> +
This will work. NS_LOCKDOWN is required for L2C-220 as well and so I was
thinking about adding a new l2c220_enable() which will set the
NS_LOCKDOWN and then call l2c_enable()
Thanks,
Sekhar
next prev parent reply other threads:[~2014-04-10 12:16 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-04 10:10 [PATCH v2 0/3] ARM: OMAP2+: AM437x: L2 cache support Sekhar Nori
2014-04-04 10:10 ` [PATCH v2 1/3] ARM: OMAP2+: L2 cache: allow different aux ctrl settings Sekhar Nori
2014-04-04 10:10 ` [PATCH v2 2/3] ARM: OMAP2+: L2 cache: get rid of init call Sekhar Nori
2014-04-04 10:10 ` [PATCH v2 3/3] ARM: OMAP2+: AM43x: L2 cache support Sekhar Nori
2014-04-04 10:18 ` Russell King - ARM Linux
2014-04-08 14:53 ` Sekhar Nori
2014-04-08 15:17 ` Santosh Shilimkar
2014-04-09 9:44 ` Sekhar Nori
2014-04-09 16:33 ` Russell King - ARM Linux
2014-04-09 16:52 ` Santosh Shilimkar
2014-04-10 12:08 ` Sekhar Nori
2014-04-09 16:23 ` Russell King - ARM Linux
2014-04-10 11:56 ` Sekhar Nori
2014-04-10 12:03 ` Russell King - ARM Linux
2014-04-10 12:16 ` Sekhar Nori [this message]
2014-04-10 13:27 ` Sekhar Nori
2014-04-10 13:40 ` Russell King - ARM Linux
2014-04-11 5:33 ` Sekhar Nori
2014-04-11 11:25 ` Russell King - ARM Linux
2014-04-11 12:01 ` Sekhar Nori
2014-04-22 5:48 ` Sekhar Nori
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=53468B8E.9040604@ti.com \
--to=nsekhar@ti$(echo .)com \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox