Subject: [PATCHv3 2/2] iio: devicetree: Add DT binding documentation for Exynos3250 ADC

From: [email-masked] (Tomasz Figa)
Date: Wed, 16 Apr 2014 13:49:34 +0200

Hi Chanwoo,

On 16.04.2014 12:11, Chanwoo Choi wrote:
> This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
> special clock ('sclk_tsadc') for ADC which provide clock to internal ADC.
>
> Cc: Rob Herring <[email-masked]>
> Cc: Pawel Moll <[email-masked]>
> Cc: Mark Rutland <[email-masked]>
> Cc: Ian Campbell <[email-masked]>
> Cc: Kumar Gala <[email-masked]>
> Cc: Randy Dunlap <[email-masked]>
> Cc: Kukjin Kim <[email-masked]>
> Cc: Naveen Krishna Chatradhi <[email-masked]>
> Cc: Tomasz Figa <[email-masked]>
> Signed-off-by: Chanwoo Choi <[email-masked]>
> Acked-by: Kyungmin Park <[email-masked]>
> ---
>   .../devicetree/bindings/arm/samsung/exynos-adc.txt   | 20 ++++++++++++++++++++
>   1 file changed, 20 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> index 5d49f2b..7532ec3 100644
> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
> @@ -14,6 +14,8 @@ Required properties:
>   				for exynos4412/5250 controllers.
>   			Must be "samsung,exynos-adc-v2" for
>   				future controllers.
> +			Must be "samsung,exynos-adc-v3" for
> +				for exynos3250 controllers.

I don't think adc-v3 is correct here. It looks like a normal V2 with 
additional special clock input. Possibly "samsung,exynos3250-adc-v2" or 
"samsung,exynos-adc-v2-sclk" would be better choices.

>   - reg:			Contains ADC register address range (base address and
>   			length) and the address of the phy enable register.
>   - interrupts: 		Contains the interrupt information for the timer. The
> @@ -21,7 +23,11 @@ Required properties:
>   			the Samsung device uses.
>   - #io-channel-cells = <1>; As ADC has multiple outputs
>   - clocks		From common clock binding: handle to adc clock.
> +			From common clock binding: handle to sclk_tsadc clock
> +			if using Exynos3250.
>   - clock-names		From common clock binding: Shall be "adc".
> +			From common clock binding: Shall be "sclk_tsadc"
> +			if using Exynos3250.
>   - vdd-supply		VDD input supply.
>
>   Note: child nodes can be added for auto probing from device tree.
> @@ -41,6 +47,20 @@ adc: adc at 12D10000 {
>   	vdd-supply = <&buck5_reg>;
>   };
>
> +If Exynos3250 uses ADC,

Please keep proper formatting:

Example: Node for ADC of Exynos3250 with additional special clock

Best regards,
Tomasz