From: m.szyprowski@samsung•com (Marek Szyprowski)
To: linux-arm-kernel@lists•infradead.org
Subject: Cache maintenance in arm_iommu_alloc_attrs for iommu_coherent_ops
Date: Thu, 22 May 2014 10:31:47 +0200 [thread overview]
Message-ID: <537DB5F3.4090000@samsung.com> (raw)
In-Reply-To: <CAD15agY8bBQZgcVqJjM2W8x5qHs5ozs-nVa1QJuzmiqHW2wFOg@mail.gmail.com>
Hello,
On 2014-05-21 11:37, Ritesh Harjani wrote:
> arm_iommu_mmap_attrs function for iommu_coherent_ops(and also for
> noncoherent iommu_ops) calls for __get_dma_pgprot.
>
> 628 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs,
> pgprot_t prot)
> 629 {
> 630 prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
> 631 pgprot_writecombine(prot) :
> 632 pgprot_dmacoherent(prot);
> 633 return prot;
> 634 }
>
> Now if someone calls for dma_mmap_coherent, then we should not be
> changing the memory to be uncached always to make it coherent right
> (from functino __get_dma_pgprot above) ??
> It should be based on dma_map_ops, and if it is iommu_coherent_ops,
> then we should not change the memory to be uncached ??
Once again you are right. This also need to be fixed.
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
next prev parent reply other threads:[~2014-05-22 8:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-21 8:52 Cache maintenance in arm_iommu_alloc_attrs for iommu_coherent_ops Ritesh Harjani
2014-05-21 9:37 ` Ritesh Harjani
2014-05-22 8:31 ` Marek Szyprowski [this message]
2014-05-22 15:52 ` Ritesh Harjani
2014-05-22 8:30 ` Marek Szyprowski
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