From: swarren@wwwdotorg•org (Stephen Warren)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v8 0/6] efuse driver for Tegra
Date: Thu, 12 Jun 2014 16:17:02 -0600 [thread overview]
Message-ID: <539A26DE.8050609@wwwdotorg.org> (raw)
In-Reply-To: <1402587400-1544-1-git-send-email-pdeschrijver@nvidia.com>
On 06/12/2014 09:36 AM, Peter De Schrijver wrote:
> This driver allows userspace to read the raw efuse data. Its userspace
> interface is modelled after the sunxi_sid driver which provides similar
> functionality for some Allwinner SoCs. It has been tested on
> Tegra20 (ventana), Tegra30 (beaverboard), Tegra114 (dalmore) and
> Tegra124 (jetson TK1).
I think this series looks OK now. However, I noticed one change in
behaviour that I don't think is expected:
The current code/DTB print:
Tegra Revision: A01 SKU: 0 CPU Process: 0 Core Process: 0
However, applying these patches and booting yields:
Tegra Revision: A01 SKU: 0 CPU Process: 1 Core Process: 1
next prev parent reply other threads:[~2014-06-12 22:17 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-12 15:36 [PATCH v8 0/6] efuse driver for Tegra Peter De Schrijver
2014-06-12 15:36 ` [PATCH v8 1/6] ARM: tegra: export apb dma readl/writel Peter De Schrijver
2014-06-12 15:36 ` [PATCH v8 2/6] ARM: tegra: move fuse exports to tegra-soc.h Peter De Schrijver
2014-06-12 15:36 ` [PATCH v8 4/6] ARM: tegra: Add efuse and apbmisc bindings Peter De Schrijver
2014-06-12 15:36 ` [PATCH v8 5/6] ARM: tegra: build new fuse driver in drivers/misc Peter De Schrijver
2014-06-12 15:36 ` [PATCH v8 6/6] misc: fuse: move APB DMA into Tegra20 fuse driver Peter De Schrijver
2014-06-12 22:17 ` Stephen Warren [this message]
2014-06-13 7:23 ` [PATCH v8 0/6] efuse driver for Tegra Peter De Schrijver
2014-06-13 8:00 ` Peter De Schrijver
2014-06-13 16:38 ` Stephen Warren
2014-06-16 18:42 ` Stephen Warren
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