Subject: [PATCH 2/3] ARM: dts: Update the parent for Audss clocks in Exynos5420

From: [email-masked] (Tushar Behera)
Date: Fri, 27 Jun 2014 09:08:12 +0530

On 06/26/2014 09:38 PM, Kevin Hilman wrote:
> Tushar Behera <[email-masked]> writes:
> 
>> On Thu, Jun 26, 2014 at 4:51 AM, Kevin Hilman <[email-masked]> wrote:
>>> Doug Anderson <[email-masked]> writes:
>>>
>>>> Tushar,
>>>>
>>>> On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera <[email-masked]> wrote:
>>>>> Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux.
>>>>> As per the user manual, it should be CLK_MAU_EPLL.
>>>>>
>>>>> The problem surfaced when the bootloader in Peach-pit board set
>>>>> the EPLL clock as the parent of AUDSS mux. While booting the kernel,
>>>>> we used to get a system hang during late boot if CLK_MAU_EPLL was
>>>>> disabled.
>>>>>
>>>>> Signed-off-by: Tushar Behera <[email-masked]>
>>>>> Signed-off-by: Shaik Ameer Basha <[email-masked]>
>>>>> Reported-by: Kevin Hilman <[email-masked]>
>>>>> ---
>>>>>  arch/arm/boot/dts/exynos5420.dtsi |    2 +-
>>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> I've tested this myself now as well.
>>>>
>>>> Tested-by: Doug Anderson <[email-masked]>
>>>
>>> For me, this patch alone (on top of -next) doesn't solve the boot hang.
>>> I still need clk_ignore_unused for a successful boot.
>>>
>>> So, this patch might be correct, but it doesn't prevent a boot hang
>>> using a chain-loaded nv_uboot on peach-pi.  There's still another clock
>>> being disabled that causes a hang.
>>>
>>> Kevin
>>
>> Kevin,
>>
>> Can you please check if adding patch 1/3 alongwith patch 2/3 fixes the
>> issue for you?
> 
> Yes, using patch 1/3 along with 2/3 fixes the issue.
> 

Okay, that adds some more reason to re-investigate patch 1/3.

Kevin,

Would you please provide me the environment setting of your u-boot?
U-boot environment on my board has been over-written, I would like to
set it same as yours and try to reproduce the issue at my end. With only
'sound init', I don't seem to hit this issue anymore.

>> Also can you please confirm that setting CLK_IGNORE_UNUSED flag
>> CLK_MAU_EPLL alone fixes the issue, without any need for
>> clk_ignore_unused in u-boot bootargs?
> 
> Yes, I have this patch[1] in my local branch which fixes the issue
> alone, without clk_ignore_unused on the command line.
> 
> Kevin
> 
> 
> [1]
> From ab1627127730ef4507ce96cbf95047d626bbb53f Mon Sep 17 00:00:00 2001
> From: Kevin Hilman <[email-masked]>
> Date: Thu, 5 Jun 2014 17:12:28 -0700
> Subject: [PATCH] KJH: leave mau_epll enabled
> 
> ---
>  drivers/clk/samsung/clk-exynos5420.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
> index 61eccf0dd72f..ed175088ee7e 100644
> --- a/drivers/clk/samsung/clk-exynos5420.c
> +++ b/drivers/clk/samsung/clk-exynos5420.c
> @@ -911,7 +911,7 @@ static struct samsung_gate_clock exynos5x_gate_clks[] __initdata = {
>  			SRC_MASK_TOP2, 24, 0, 0),
>  
>  	GATE(CLK_MAU_EPLL, "mau_epll", "mout_mau_epll_clk",
> -			SRC_MASK_TOP7, 20, 0, 0),
> +			SRC_MASK_TOP7, 20, CLK_IGNORE_UNUSED, 0),
>  
>  	/* sclk */
>  	GATE(CLK_SCLK_UART0, "sclk_uart0", "dout_uart0",
> 

-- 
Tushar Behera