From: santosh.shilimkar@ti•com (Santosh Shilimkar)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 07/10] ARM: OMAP5 / DRA7: Enable CPU RET on suspend
Date: Wed, 27 Aug 2014 15:43:19 -0400 [thread overview]
Message-ID: <53FE34D7.7040004@ti.com> (raw)
In-Reply-To: <20140827194156.GE16006@atomide.com>
On Wednesday 27 August 2014 03:41 PM, Tony Lindgren wrote:
> * Nishanth Menon <nm@ti•com> [140827 12:05]:
>> On 08/27/2014 01:58 PM, Kevin Hilman wrote:
>>> Nishanth Menon <nm@ti•com> writes:
>>>
>>>> From: Rajendra Nayak <rnayak@ti•com>
>>>>
>>>> On OMAP5 / DRA7, prevent a CPU powerdomain OFF and resulting MPU OSWR
>>>> and instead attempt a CPU RET and side effect, MPU RET in suspend.
>>>>
>>>> Signed-off-by: Rajendra Nayak <rnayak@ti•com>
>>>> [nm at ti.com: update to do save_state only on DRA7]
>>>> Signed-off-by: Nishanth Menon <nm@ti•com>
>>>> ---
>>>> arch/arm/mach-omap2/omap-mpuss-lowpower.c | 4 ++++
>>>> arch/arm/mach-omap2/omap-wakeupgen.c | 2 +-
>>>> arch/arm/mach-omap2/pm44xx.c | 9 +++++++--
>>>> 3 files changed, 12 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
>>>> index 207fce2..0d640eb 100644
>>>> --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
>>>> +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
>>>> @@ -242,6 +242,10 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
>>>> save_state = 1;
>>>> break;
>>>> case PWRDM_POWER_RET:
>>>> + if (soc_is_omap54xx() || soc_is_dra7xx()) {
>>>
>>> Aren't we trying to get away from these soc_* checks for anything other
>>> than init code?
>>
>> I would expect that to take place in stages as part of which the next
>> level of cleanup is to move PRM into drivers. Currently our wakeupgen,
>> prm code does have quiet a few needs of dealing with soc_is checks
>> primarily from having to re-architect code in two different directions
>> - we want to move into just one direction eventually - to prm drivers
>> and as less code in mach-omap2 which is already in the works.
>
> Why don't you just set some flag at init time based on the
> soc_is check and then test that here? That limits the use of
> soc_is to init code only which makes it easier to phase it
> out completely eventually.
>
Indeed. Infact the version of the code I tried posting last year was
using a flag which was initialised during init. Same can be
done her.
Regards,
Santosh
next prev parent reply other threads:[~2014-08-27 19:43 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-22 14:02 [PATCH 00/10] ARM: OMAP5 / DRA7: Add framework for suspend and cpuidle Nishanth Menon
2014-08-22 14:02 ` [PATCH 01/10] ARM: OMAP5 / DRA7: PM: Update CPU context register offset Nishanth Menon
2014-08-22 14:02 ` [PATCH 02/10] ARM: OMAP5 / DRA7: PM: Set MPUSS-EMIF clock-domain static dependency Nishanth Menon
2014-08-27 18:44 ` Kevin Hilman
2014-08-22 14:02 ` [PATCH 03/10] ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by default Nishanth Menon
2014-08-22 14:02 ` [PATCH 04/10] ARM: OMAP5 / DRA7: PM: Enable Mercury retention mode on CPUx powerdomains Nishanth Menon
2014-08-22 14:02 ` [PATCH 05/10] ARM: OMAP5 / DRA7: PM: Avoid all SAR saves Nishanth Menon
2014-08-22 14:02 ` [PATCH 06/10] ARM: OMAP5 / DRA7: PM: Provide a dummy startup function for CPU hotplug Nishanth Menon
2014-08-22 14:02 ` [PATCH 07/10] ARM: OMAP5 / DRA7: Enable CPU RET on suspend Nishanth Menon
2014-08-27 18:58 ` Kevin Hilman
2014-08-27 19:05 ` Nishanth Menon
2014-08-27 19:41 ` Tony Lindgren
2014-08-27 19:43 ` Santosh Shilimkar [this message]
2014-08-27 19:45 ` Nishanth Menon
2014-09-05 21:15 ` Nishanth Menon
2014-09-05 21:30 ` Tony Lindgren
2014-09-08 17:23 ` Grazvydas Ignotas
2014-09-08 18:34 ` Nishanth Menon
2014-08-22 14:02 ` [PATCH 08/10] ARM: OMAP5/DRA7: PM: cpuidle MPU CSWR support Nishanth Menon
2014-08-27 19:13 ` Kevin Hilman
2014-08-27 19:35 ` Nishanth Menon
2014-08-27 19:41 ` Santosh Shilimkar
2014-08-27 20:22 ` Kevin Hilman
2014-09-05 21:18 ` Nishanth Menon
2014-09-16 16:34 ` Nishanth Menon
2014-09-17 18:49 ` Daniel Lezcano
2014-09-17 23:20 ` Shilimkar, Santosh
2014-09-18 0:22 ` Daniel Lezcano
2014-09-18 0:42 ` Shilimkar, Santosh
2014-09-18 13:41 ` Nishanth Menon
2014-09-18 13:50 ` Nishanth Menon
2014-09-22 13:02 ` Nishanth Menon
2014-09-22 13:17 ` Nishanth Menon
2014-08-22 14:02 ` [PATCH 09/10] ARM: OMAP5: Add hook in SoC initcalls to enable pm initialization Nishanth Menon
2014-08-22 14:02 ` [PATCH 10/10] ARM: DRA7: " Nishanth Menon
2014-08-25 16:36 ` [PATCH 00/10] ARM: OMAP5 / DRA7: Add framework for suspend and cpuidle Nishanth Menon
2014-08-27 19:15 ` Kevin Hilman
2014-09-08 16:29 ` Nishanth Menon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=53FE34D7.7040004@ti.com \
--to=santosh.shilimkar@ti$(echo .)com \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox